Файловый менеджер

Файловый менеджер - Редактировать - /var/www/xthruster/html/wp-content/uploads/flags/c6x.tar

Назад
include/uapi/asm/setup.h��0000644��00000000301�14722072070�0011211 0��ustar�00��/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note / #ifndef _UAPI_ASM_C6X_SETUP_H #define _UAPI_ASM_C6X_SETUP_H #define COMMAND_LINE_SIZE 1024 #endif / _UAPI_ASM_C6X_SETUP_H / ��include/uapi/asm/unistd.h��0000644��00000001761�14722072070�0011372 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note / / * Copyright (C) 2011 Texas Instruments Incorporated * * Based on arch/tile version. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation, version 2. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or * NON INFRINGEMENT. See the GNU General Public License for * more details. / #define __ARCH_WANT_RENAMEAT #define __ARCH_WANT_STAT64 #define __ARCH_WANT_SET_GET_RLIMIT #define __ARCH_WANT_SYS_CLONE #define __ARCH_WANT_TIME32_SYSCALLS / Use the standard ABI for syscalls. / #include <asm-generic/unistd.h> / C6X-specific syscalls. / #define __NR_cache_sync (__NR_arch_specific_syscall + 0) __SYSCALL(__NR_cache_sync, sys_cache_sync) ��include/uapi/asm/swab.h��0000644��00000002515�14722072070�0011016 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note / / * Copyright (C) 2011 Texas Instruments Incorporated * Author: Mark Salter <msalter@redhat.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. / #ifndef _ASM_C6X_SWAB_H #define _ASM_C6X_SWAB_H static inline __attribute_const__ __u16 __c6x_swab16(__u16 val) { asm("swap4 .l1 %0,%0\n" : "+a"(val)); return val; } static inline __attribute_const__ __u32 __c6x_swab32(__u32 val) { asm("swap4 .l1 %0,%0\n" "swap2 .l1 %0,%0\n" : "+a"(val)); return val; } static inline __attribute_const__ __u64 __c6x_swab64(__u64 val) { asm(" swap2 .s1 %p0,%P0\n" "\|\| swap2 .l1 %P0,%p0\n" " swap4 .l1 %p0,%p0\n" " swap4 .l1 %P0,%P0\n" : "+a"(val)); return val; } static inline __attribute_const__ __u32 __c6x_swahw32(__u32 val) { asm("swap2 .l1 %0,%0\n" : "+a"(val)); return val; } static inline __attribute_const__ __u32 __c6x_swahb32(__u32 val) { asm("swap4 .l1 %0,%0\n" : "+a"(val)); return val; } #define __arch_swab16 __c6x_swab16 #define __arch_swab32 __c6x_swab32 #define __arch_swab64 __c6x_swab64 #define __arch_swahw32 __c6x_swahw32 #define __arch_swahb32 __c6x_swahb32 #endif / _ASM_C6X_SWAB_H / ��include/uapi/asm/sigcontext.h��0000644��00000003623�14722072070�0012252 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2009 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. / #ifndef _ASM_C6X_SIGCONTEXT_H #define _ASM_C6X_SIGCONTEXT_H struct sigcontext { unsigned long sc_mask; / old sigmask / unsigned long sc_sp; / old user stack pointer / unsigned long sc_a4; unsigned long sc_b4; unsigned long sc_a6; unsigned long sc_b6; unsigned long sc_a8; unsigned long sc_b8; unsigned long sc_a0; unsigned long sc_a1; unsigned long sc_a2; unsigned long sc_a3; unsigned long sc_a5; unsigned long sc_a7; unsigned long sc_a9; unsigned long sc_b0; unsigned long sc_b1; unsigned long sc_b2; unsigned long sc_b3; unsigned long sc_b5; unsigned long sc_b7; unsigned long sc_b9; unsigned long sc_a16; unsigned long sc_a17; unsigned long sc_a18; unsigned long sc_a19; unsigned long sc_a20; unsigned long sc_a21; unsigned long sc_a22; unsigned long sc_a23; unsigned long sc_a24; unsigned long sc_a25; unsigned long sc_a26; unsigned long sc_a27; unsigned long sc_a28; unsigned long sc_a29; unsigned long sc_a30; unsigned long sc_a31; unsigned long sc_b16; unsigned long sc_b17; unsigned long sc_b18; unsigned long sc_b19; unsigned long sc_b20; unsigned long sc_b21; unsigned long sc_b22; unsigned long sc_b23; unsigned long sc_b24; unsigned long sc_b25; unsigned long sc_b26; unsigned long sc_b27; unsigned long sc_b28; unsigned long sc_b29; unsigned long sc_b30; unsigned long sc_b31; unsigned long sc_csr; unsigned long sc_pc; }; #endif / _ASM_C6X_SIGCONTEXT_H / ��include/uapi/asm/byteorder.h��0000644��00000000510�14722072070�0012052 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note / #ifndef _ASM_C6X_BYTEORDER_H #define _ASM_C6X_BYTEORDER_H #include <asm/types.h> #ifdef _BIG_ENDIAN #include <linux/byteorder/big_endian.h> #else / _BIG_ENDIAN / #include <linux/byteorder/little_endian.h> #endif / _BIG_ENDIAN / #endif / _ASM_BYTEORDER_H / ��include/uapi/asm/Kbuild��0000644��00000000073�14722072070�0011043 0��ustar�00��# SPDX-License-Identifier: GPL-2.0 generic-y += ucontext.h ��include/uapi/asm/ptrace.h��0000644��00000010671�14722072070�0011342 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note / / * Copyright (C) 2004, 2006, 2009, 2010 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) * * Updated for 2.6.34: Mark Salter <msalter@redhat.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. / #ifndef _UAPI_ASM_C6X_PTRACE_H #define _UAPI_ASM_C6X_PTRACE_H #define BKPT_OPCODE 0x56454314 / illegal opcode / #ifdef _BIG_ENDIAN #define PT_LO(odd, even) odd #define PT_HI(odd, even) even #else #define PT_LO(odd, even) even #define PT_HI(odd, even) odd #endif #define PT_A4_ORG PT_LO(1, 0) #define PT_TSR PT_HI(1, 0) #define PT_ILC PT_LO(3, 2) #define PT_RILC PT_HI(3, 2) #define PT_CSR PT_LO(5, 4) #define PT_PC PT_HI(5, 4) #define PT_B16 PT_LO(7, 6) #define PT_B17 PT_HI(7, 6) #define PT_B18 PT_LO(9, 8) #define PT_B19 PT_HI(9, 8) #define PT_B20 PT_LO(11, 10) #define PT_B21 PT_HI(11, 10) #define PT_B22 PT_LO(13, 12) #define PT_B23 PT_HI(13, 12) #define PT_B24 PT_LO(15, 14) #define PT_B25 PT_HI(15, 14) #define PT_B26 PT_LO(17, 16) #define PT_B27 PT_HI(17, 16) #define PT_B28 PT_LO(19, 18) #define PT_B29 PT_HI(19, 18) #define PT_B30 PT_LO(21, 20) #define PT_B31 PT_HI(21, 20) #define PT_B0 PT_LO(23, 22) #define PT_B1 PT_HI(23, 22) #define PT_B2 PT_LO(25, 24) #define PT_B3 PT_HI(25, 24) #define PT_B4 PT_LO(27, 26) #define PT_B5 PT_HI(27, 26) #define PT_B6 PT_LO(29, 28) #define PT_B7 PT_HI(29, 28) #define PT_B8 PT_LO(31, 30) #define PT_B9 PT_HI(31, 30) #define PT_B10 PT_LO(33, 32) #define PT_B11 PT_HI(33, 32) #define PT_B12 PT_LO(35, 34) #define PT_B13 PT_HI(35, 34) #define PT_A16 PT_LO(37, 36) #define PT_A17 PT_HI(37, 36) #define PT_A18 PT_LO(39, 38) #define PT_A19 PT_HI(39, 38) #define PT_A20 PT_LO(41, 40) #define PT_A21 PT_HI(41, 40) #define PT_A22 PT_LO(43, 42) #define PT_A23 PT_HI(43, 42) #define PT_A24 PT_LO(45, 44) #define PT_A25 PT_HI(45, 44) #define PT_A26 PT_LO(47, 46) #define PT_A27 PT_HI(47, 46) #define PT_A28 PT_LO(49, 48) #define PT_A29 PT_HI(49, 48) #define PT_A30 PT_LO(51, 50) #define PT_A31 PT_HI(51, 50) #define PT_A0 PT_LO(53, 52) #define PT_A1 PT_HI(53, 52) #define PT_A2 PT_LO(55, 54) #define PT_A3 PT_HI(55, 54) #define PT_A4 PT_LO(57, 56) #define PT_A5 PT_HI(57, 56) #define PT_A6 PT_LO(59, 58) #define PT_A7 PT_HI(59, 58) #define PT_A8 PT_LO(61, 60) #define PT_A9 PT_HI(61, 60) #define PT_A10 PT_LO(63, 62) #define PT_A11 PT_HI(63, 62) #define PT_A12 PT_LO(65, 64) #define PT_A13 PT_HI(65, 64) #define PT_A14 PT_LO(67, 66) #define PT_A15 PT_HI(67, 66) #define PT_B14 PT_LO(69, 68) #define PT_B15 PT_HI(69, 68) #define NR_PTREGS 70 #define PT_DP PT_B14 / Data Segment Pointer (B14) / #define PT_SP PT_B15 / Stack Pointer (B15) / #define PTRACE_GETFDPIC 31 / get the ELF fdpic loadmap address / #define PTRACE_GETFDPIC_EXEC 0 / [addr] request the executable loadmap / #define PTRACE_GETFDPIC_INTERP 1 / [addr] request the interpreter loadmap / #ifndef __ASSEMBLY__ #ifdef _BIG_ENDIAN #define REG_PAIR(odd, even) unsigned long odd; unsigned long even #else #define REG_PAIR(odd, even) unsigned long even; unsigned long odd #endif / * this struct defines the way the registers are stored on the * stack during a system call. fields defined with REG_PAIR * are saved and restored using double-word memory operations * which means the word ordering of the pair depends on endianess. / struct pt_regs { REG_PAIR(tsr, orig_a4); REG_PAIR(rilc, ilc); REG_PAIR(pc, csr); REG_PAIR(b17, b16); REG_PAIR(b19, b18); REG_PAIR(b21, b20); REG_PAIR(b23, b22); REG_PAIR(b25, b24); REG_PAIR(b27, b26); REG_PAIR(b29, b28); REG_PAIR(b31, b30); REG_PAIR(b1, b0); REG_PAIR(b3, b2); REG_PAIR(b5, b4); REG_PAIR(b7, b6); REG_PAIR(b9, b8); REG_PAIR(b11, b10); REG_PAIR(b13, b12); REG_PAIR(a17, a16); REG_PAIR(a19, a18); REG_PAIR(a21, a20); REG_PAIR(a23, a22); REG_PAIR(a25, a24); REG_PAIR(a27, a26); REG_PAIR(a29, a28); REG_PAIR(a31, a30); REG_PAIR(a1, a0); REG_PAIR(a3, a2); REG_PAIR(a5, a4); REG_PAIR(a7, a6); REG_PAIR(a9, a8); REG_PAIR(a11, a10); REG_PAIR(a13, a12); REG_PAIR(a15, a14); REG_PAIR(sp, dp); }; #endif / __ASSEMBLY__ / #endif / _UAPI_ASM_C6X_PTRACE_H / ��include/asm/irq.h��0000644��00000002710�14722072070�0007714 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2006, 2009, 2010, 2011 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) * * Large parts taken directly from powerpc. / #ifndef _ASM_C6X_IRQ_H #define _ASM_C6X_IRQ_H #include <linux/irqdomain.h> #include <linux/threads.h> #include <linux/list.h> #include <linux/radix-tree.h> #include <asm/percpu.h> #define irq_canonicalize(irq) (irq) / * The C64X+ core has 16 IRQ vectors. One each is used by Reset and NMI. Two * are reserved. The remaining 12 vectors are used to route SoC interrupts. * These interrupt vectors are prioritized with IRQ 4 having the highest * priority and IRQ 15 having the lowest. * * The C64x+ megamodule provides a PIC which combines SoC IRQ sources into a * single core IRQ vector. There are four combined sources, each of which * feed into one of the 12 general interrupt vectors. The remaining 8 vectors * can each route a single SoC interrupt directly. / #define NR_PRIORITY_IRQS 16 / Total number of virq in the platform / #define NR_IRQS 256 / This number is used when no interrupt has been assigned / #define NO_IRQ 0 extern void __init init_pic_c64xplus(void); extern void init_IRQ(void); struct pt_regs; extern asmlinkage void c6x_do_IRQ(unsigned int prio, struct pt_regs regs); extern unsigned long irq_err_count; #endif /* _ASM_C6X_IRQ_H / ��include/asm/page.h��0000644��00000000470�14722072070�0010036 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0 / #ifndef _ASM_C6X_PAGE_H #define _ASM_C6X_PAGE_H #define VM_DATA_DEFAULT_FLAGS \ (VM_READ \| VM_WRITE \| \ ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) \| \ VM_MAYREAD \| VM_MAYWRITE \| VM_MAYEXEC) #include <asm-generic/page.h> #endif / _ASM_C6X_PAGE_H / ��include/asm/cacheflush.h��0000644��00000003640�14722072070�0011231 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) / #ifndef _ASM_C6X_CACHEFLUSH_H #define _ASM_C6X_CACHEFLUSH_H #include <linux/spinlock.h> #include <asm/setup.h> #include <asm/cache.h> #include <asm/mman.h> #include <asm/page.h> #include <asm/string.h> / * virtually-indexed cache management (our cache is physically indexed) / #define flush_cache_all() do {} while (0) #define flush_cache_mm(mm) do {} while (0) #define flush_cache_dup_mm(mm) do {} while (0) #define flush_cache_range(mm, start, end) do {} while (0) #define flush_cache_page(vma, vmaddr, pfn) do {} while (0) #define flush_cache_vmap(start, end) do {} while (0) #define flush_cache_vunmap(start, end) do {} while (0) #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 #define flush_dcache_page(page) do {} while (0) #define flush_dcache_mmap_lock(mapping) do {} while (0) #define flush_dcache_mmap_unlock(mapping) do {} while (0) / * physically-indexed cache management / #define flush_icache_range(s, e) \ do { \ L1D_cache_block_writeback((s), (e)); \ L1P_cache_block_invalidate((s), (e)); \ } while (0) #define flush_icache_page(vma, page) \ do { \ if ((vma)->vm_flags & PROT_EXEC) \ L1D_cache_block_writeback_invalidate(page_address(page), \ (unsigned long) page_address(page) + PAGE_SIZE)); \ L1P_cache_block_invalidate(page_address(page), \ (unsigned long) page_address(page) + PAGE_SIZE)); \ } while (0) #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ do { \ memcpy(dst, src, len); \ flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \ } while (0) #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ memcpy(dst, src, len) #endif / _ASM_C6X_CACHEFLUSH_H / ��include/asm/syscall.h��0000644��00000003144�14722072070�0010575 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-or-later / / * Copyright (C) 2011 Texas Instruments Incorporated * Author: Mark Salter <msalter@redhat.com> / #ifndef __ASM_C6X_SYSCALL_H #define __ASM_C6X_SYSCALL_H #include <uapi/linux/audit.h> #include <linux/err.h> #include <linux/sched.h> static inline int syscall_get_nr(struct task_struct task, struct pt_regs regs) { return regs->b0; } static inline void syscall_rollback(struct task_struct task, struct pt_regs regs) { / do nothing / } static inline long syscall_get_error(struct task_struct task, struct pt_regs regs) { return IS_ERR_VALUE(regs->a4) ? regs->a4 : 0; } static inline long syscall_get_return_value(struct task_struct task, struct pt_regs regs) { return regs->a4; } static inline void syscall_set_return_value(struct task_struct task, struct pt_regs regs, int error, long val) { regs->a4 = error ?: val; } static inline void syscall_get_arguments(struct task_struct task, struct pt_regs regs, unsigned long args) { args++ = regs->a4; args++ = regs->b4; args++ = regs->a6; args++ = regs->b6; args++ = regs->a8; args = regs->b8; } static inline void syscall_set_arguments(struct task_struct task, struct pt_regs regs, const unsigned long args) { regs->a4 = args++; regs->b4 = args++; regs->a6 = args++; regs->b6 = args++; regs->a8 = args++; regs->a9 = args; } static inline int syscall_get_arch(struct task_struct task) { return IS_ENABLED(CONFIG_CPU_BIG_ENDIAN) ? AUDIT_ARCH_C6XBE : AUDIT_ARCH_C6X; } #endif /* __ASM_C6X_SYSCALLS_H / ��include/asm/megamod-pic.h��0000644��00000000325�14722072070�0011303 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0 / #ifndef _C6X_MEGAMOD_PIC_H #define _C6X_MEGAMOD_PIC_H #ifdef __KERNEL__ extern void __init megamod_pic_init(void); #endif / __KERNEL__ / #endif / _C6X_MEGAMOD_PIC_H / ��include/asm/procinfo.h��0000644��00000001014�14722072070�0010734 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Copyright (C) 2010 Texas Instruments Incorporated * Author: Mark Salter (msalter@redhat.com) / #ifndef _ASM_C6X_PROCINFO_H #define _ASM_C6X_PROCINFO_H #ifdef __KERNEL__ struct proc_info_list { unsigned int cpu_val; unsigned int cpu_mask; const char arch_name; const char elf_name; unsigned int elf_hwcap; }; #else / __KERNEL__ / #include <asm/elf.h> #warning "Please include asm/elf.h instead" #endif / __KERNEL__ / #endif / _ASM_C6X_PROCINFO_H / ��include/asm/bitops.h��0000644��00000004047�14722072070�0010426 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) / #ifndef _ASM_C6X_BITOPS_H #define _ASM_C6X_BITOPS_H #ifdef __KERNEL__ #include <linux/bitops.h> #include <asm/byteorder.h> #include <asm/barrier.h> / * We are lucky, DSP is perfect for bitops: do it in 3 cycles / /* * __ffs - find first bit in word. * @word: The word to search * * Undefined if no bit exists, so code should check against 0 first. * Note __ffs(0) = undef, __ffs(1) = 0, __ffs(0x80000000) = 31. * / static inline unsigned long __ffs(unsigned long x) { asm (" bitr .M1 %0,%0\n" " nop\n" " lmbd .L1 1,%0,%0\n" : "+a"(x)); return x; } / * ffz - find first zero in word. * @word: The word to search * * Undefined if no zero exists, so code should check against ~0UL first. / #define ffz(x) __ffs(~(x)) /* * fls - find last (most-significant) bit set * @x: the word to search * * This is defined the same way as ffs. * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. / static inline int fls(unsigned int x) { if (!x) return 0; asm (" lmbd .L1 1,%0,%0\n" : "+a"(x)); return 32 - x; } /* * ffs - find first bit set * @x: the word to search * * This is defined the same way as * the libc and compiler builtin ffs routines, therefore * differs in spirit from the above ffz (man ffs). * Note ffs(0) = 0, ffs(1) = 1, ffs(0x80000000) = 32. / static inline int ffs(int x) { if (!x) return 0; return __ffs(x) + 1; } #include <asm-generic/bitops/__fls.h> #include <asm-generic/bitops/fls64.h> #include <asm-generic/bitops/find.h> #include <asm-generic/bitops/sched.h> #include <asm-generic/bitops/hweight.h> #include <asm-generic/bitops/lock.h> #include <asm-generic/bitops/atomic.h> #include <asm-generic/bitops/non-atomic.h> #include <asm-generic/bitops/le.h> #include <asm-generic/bitops/ext2-atomic.h> #endif / __KERNEL__ / #endif / _ASM_C6X_BITOPS_H / ��include/asm/setup.h��0000644��00000001462�14722072070�0010264 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2009, 2010 2011 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) / #ifndef _ASM_C6X_SETUP_H #define _ASM_C6X_SETUP_H #include <uapi/asm/setup.h> #include <linux/types.h> #ifndef __ASSEMBLY__ extern int c6x_add_memory(phys_addr_t start, unsigned long size); extern unsigned long ram_start; extern unsigned long ram_end; extern int c6x_num_cores; extern unsigned int c6x_silicon_rev; extern unsigned int c6x_devstat; extern unsigned char c6x_fuse_mac[6]; extern void machine_init(unsigned long dt_ptr); extern void time_init(void); extern void coherent_mem_init(u32 start, u32 size); #endif / !__ASSEMBLY__ / #endif / _ASM_C6X_SETUP_H / ��include/asm/timex.h��0000644��00000001316�14722072070�0010250 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) * * Modified for 2.6.34: Mark Salter <msalter@redhat.com> / #ifndef _ASM_C6X_TIMEX_H #define _ASM_C6X_TIMEX_H #define CLOCK_TICK_RATE ((1000 1000000UL) / 6) /* 64-bit timestamp / typedef unsigned long long cycles_t; static inline cycles_t get_cycles(void) { unsigned l, h; asm volatile (" dint\n" " mvc .s2 TSCL,%0\n" " mvc .s2 TSCH,%1\n" " rint\n" : "=b"(l), "=b"(h)); return ((cycles_t)h << 32) \| l; } #endif / _ASM_C6X_TIMEX_H / ��include/asm/uaccess.h��0000644��00000003771�14722072070�0010557 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Copyright (C) 2011 Texas Instruments Incorporated * Author: Mark Salter <msalter@redhat.com> / #ifndef _ASM_C6X_UACCESS_H #define _ASM_C6X_UACCESS_H #include <linux/types.h> #include <linux/compiler.h> #include <linux/string.h> / * C6X supports unaligned 32 and 64 bit loads and stores. / static inline __must_check unsigned long raw_copy_from_user(void to, const void __user from, unsigned long n) { u32 tmp32; u64 tmp64; if (__builtin_constant_p(n)) { switch (n) { case 1: (u8 )to = (u8 __force )from; return 0; case 4: asm volatile ("ldnw .d1t1 %2,%0\n" "nop 4\n" "stnw .d1t1 %0,%1\n" : "=&a"(tmp32) : "A"(to), "a"(from) : "memory"); return 0; case 8: asm volatile ("ldndw .d1t1 %2,%0\n" "nop 4\n" "stndw .d1t1 %0,%1\n" : "=&a"(tmp64) : "a"(to), "a"(from) : "memory"); return 0; default: break; } } memcpy(to, (const void __force )from, n); return 0; } static inline __must_check unsigned long raw_copy_to_user(void __user to, const void from, unsigned long n) { u32 tmp32; u64 tmp64; if (__builtin_constant_p(n)) { switch (n) { case 1: (u8 __force )to = (u8 )from; return 0; case 4: asm volatile ("ldnw .d1t1 %2,%0\n" "nop 4\n" "stnw .d1t1 %0,%1\n" : "=&a"(tmp32) : "a"(to), "a"(from) : "memory"); return 0; case 8: asm volatile ("ldndw .d1t1 %2,%0\n" "nop 4\n" "stndw .d1t1 %0,%1\n" : "=&a"(tmp64) : "a"(to), "a"(from) : "memory"); return 0; default: break; } } memcpy((void __force )to, from, n); return 0; } #define INLINE_COPY_FROM_USER #define INLINE_COPY_TO_USER extern int _access_ok(unsigned long addr, unsigned long size); #ifdef CONFIG_ACCESS_CHECK #define __access_ok _access_ok #endif #include <asm-generic/uaccess.h> #endif / _ASM_C6X_UACCESS_H / ��include/asm/bug.h��0000644��00000001054�14722072070�0007676 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) / #ifndef _ASM_C6X_BUG_H #define _ASM_C6X_BUG_H #include <linux/linkage.h> #include <asm-generic/bug.h> struct pt_regs; extern void die(char str, struct pt_regs fp, int nr); extern asmlinkage int process_exception(struct pt_regs regs); extern asmlinkage void enable_exception(void); #endif /* _ASM_C6X_BUG_H / ��include/asm/cache.h��0000644��00000005721�14722072070�0010171 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2005, 2006, 2009, 2010, 2012 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) / #ifndef _ASM_C6X_CACHE_H #define _ASM_C6X_CACHE_H #include <linux/irqflags.h> #include <linux/init.h> / * Cache line size / #define L1D_CACHE_SHIFT 6 #define L1D_CACHE_BYTES (1 << L1D_CACHE_SHIFT) #define L1P_CACHE_SHIFT 5 #define L1P_CACHE_BYTES (1 << L1P_CACHE_SHIFT) #define L2_CACHE_SHIFT 7 #define L2_CACHE_BYTES (1 << L2_CACHE_SHIFT) / * L2 used as cache / #define L2MODE_SIZE L2MODE_256K_CACHE / * For practical reasons the L1_CACHE_BYTES defines should not be smaller than * the L2 line size / #define L1_CACHE_SHIFT L2_CACHE_SHIFT #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) #define L2_CACHE_ALIGN_LOW(x) \ (((x) & ~(L2_CACHE_BYTES - 1))) #define L2_CACHE_ALIGN_UP(x) \ (((x) + (L2_CACHE_BYTES - 1)) & ~(L2_CACHE_BYTES - 1)) #define L2_CACHE_ALIGN_CNT(x) \ (((x) + (sizeof(int) - 1)) & ~(sizeof(int) - 1)) #define ARCH_DMA_MINALIGN L1_CACHE_BYTES #define ARCH_SLAB_MINALIGN L1_CACHE_BYTES / * This is the granularity of hardware cacheability control. / #define CACHEABILITY_ALIGN 0x01000000 / * Align a physical address to MAR regions / #define CACHE_REGION_START(v) \ (((u32) (v)) & ~(CACHEABILITY_ALIGN - 1)) #define CACHE_REGION_END(v) \ (((u32) (v) + (CACHEABILITY_ALIGN - 1)) & ~(CACHEABILITY_ALIGN - 1)) extern void __init c6x_cache_init(void); extern void enable_caching(unsigned long start, unsigned long end); extern void disable_caching(unsigned long start, unsigned long end); extern void L1_cache_off(void); extern void L1_cache_on(void); extern void L1P_cache_global_invalidate(void); extern void L1D_cache_global_invalidate(void); extern void L1D_cache_global_writeback(void); extern void L1D_cache_global_writeback_invalidate(void); extern void L2_cache_set_mode(unsigned int mode); extern void L2_cache_global_writeback_invalidate(void); extern void L2_cache_global_writeback(void); extern void L1P_cache_block_invalidate(unsigned int start, unsigned int end); extern void L1D_cache_block_invalidate(unsigned int start, unsigned int end); extern void L1D_cache_block_writeback_invalidate(unsigned int start, unsigned int end); extern void L1D_cache_block_writeback(unsigned int start, unsigned int end); extern void L2_cache_block_invalidate(unsigned int start, unsigned int end); extern void L2_cache_block_writeback(unsigned int start, unsigned int end); extern void L2_cache_block_writeback_invalidate(unsigned int start, unsigned int end); extern void L2_cache_block_invalidate_nowait(unsigned int start, unsigned int end); extern void L2_cache_block_writeback_nowait(unsigned int start, unsigned int end); extern void L2_cache_block_writeback_invalidate_nowait(unsigned int start, unsigned int end); #endif / _ASM_C6X_CACHE_H / ��include/asm/unaligned.h��0000644��00000010755�14722072070�0011077 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) * Rewritten for 2.6.3x: Mark Salter <msalter@redhat.com> / #ifndef _ASM_C6X_UNALIGNED_H #define _ASM_C6X_UNALIGNED_H #include <linux/swab.h> / * The C64x+ can do unaligned word and dword accesses in hardware * using special load/store instructions. / static inline u16 get_unaligned_le16(const void p) { const u8 _p = p; return _p[0] \| _p[1] << 8; } static inline u16 get_unaligned_be16(const void p) { const u8 _p = p; return _p[0] << 8 \| _p[1]; } static inline void put_unaligned_le16(u16 val, void p) { u8 _p = p; _p[0] = val; _p[1] = val >> 8; } static inline void put_unaligned_be16(u16 val, void p) { u8 _p = p; _p[0] = val >> 8; _p[1] = val; } static inline u32 get_unaligned32(const void p) { u32 val = (u32) p; asm (" ldnw .d1t1 %0,%0\n" " nop 4\n" : "+a"(val)); return val; } static inline void put_unaligned32(u32 val, void p) { asm volatile (" stnw .d2t1 %0,%1\n" : : "a"(val), "b"(p) : "memory"); } static inline u64 get_unaligned64(const void p) { u64 val; asm volatile (" ldndw .d1t1 %1,%0\n" " nop 4\n" : "=a"(val) : "a"(p)); return val; } static inline void put_unaligned64(u64 val, const void p) { asm volatile (" stndw .d2t1 %0,%1\n" : : "a"(val), "b"(p) : "memory"); } #ifdef CONFIG_CPU_BIG_ENDIAN #define get_unaligned_le32(p) __swab32(get_unaligned32(p)) #define get_unaligned_le64(p) __swab64(get_unaligned64(p)) #define get_unaligned_be32(p) get_unaligned32(p) #define get_unaligned_be64(p) get_unaligned64(p) #define put_unaligned_le32(v, p) put_unaligned32(__swab32(v), (p)) #define put_unaligned_le64(v, p) put_unaligned64(__swab64(v), (p)) #define put_unaligned_be32(v, p) put_unaligned32((v), (p)) #define put_unaligned_be64(v, p) put_unaligned64((v), (p)) #define get_unaligned __get_unaligned_be #define put_unaligned __put_unaligned_be #else #define get_unaligned_le32(p) get_unaligned32(p) #define get_unaligned_le64(p) get_unaligned64(p) #define get_unaligned_be32(p) __swab32(get_unaligned32(p)) #define get_unaligned_be64(p) __swab64(get_unaligned64(p)) #define put_unaligned_le32(v, p) put_unaligned32((v), (p)) #define put_unaligned_le64(v, p) put_unaligned64((v), (p)) #define put_unaligned_be32(v, p) put_unaligned32(__swab32(v), (p)) #define put_unaligned_be64(v, p) put_unaligned64(__swab64(v), (p)) #define get_unaligned __get_unaligned_le #define put_unaligned __put_unaligned_le #endif / * Cause a link-time error if we try an unaligned access other than * 1,2,4 or 8 bytes long / extern int __bad_unaligned_access_size(void); #define __get_unaligned_le(ptr) (typeof((ptr)))({ \ sizeof((ptr)) == 1 ? (ptr) : \ (sizeof((ptr)) == 2 ? get_unaligned_le16((ptr)) : \ (sizeof((ptr)) == 4 ? get_unaligned_le32((ptr)) : \ (sizeof((ptr)) == 8 ? get_unaligned_le64((ptr)) : \ __bad_unaligned_access_size()))); \ }) #define __get_unaligned_be(ptr) (__force typeof((ptr)))({ \ sizeof((ptr)) == 1 ? (ptr) : \ (sizeof((ptr)) == 2 ? get_unaligned_be16((ptr)) : \ (sizeof((ptr)) == 4 ? get_unaligned_be32((ptr)) : \ (sizeof((ptr)) == 8 ? get_unaligned_be64((ptr)) : \ __bad_unaligned_access_size()))); \ }) #define __put_unaligned_le(val, ptr) ({ \ void __gu_p = (ptr); \ switch (sizeof((ptr))) { \ case 1: \ (u8 )__gu_p = (__force u8)(val); \ break; \ case 2: \ put_unaligned_le16((__force u16)(val), __gu_p); \ break; \ case 4: \ put_unaligned_le32((__force u32)(val), __gu_p); \ break; \ case 8: \ put_unaligned_le64((__force u64)(val), __gu_p); \ break; \ default: \ __bad_unaligned_access_size(); \ break; \ } \ (void)0; }) #define __put_unaligned_be(val, ptr) ({ \ void __gu_p = (ptr); \ switch (sizeof((ptr))) { \ case 1: \ (u8 )__gu_p = (__force u8)(val); \ break; \ case 2: \ put_unaligned_be16((__force u16)(val), __gu_p); \ break; \ case 4: \ put_unaligned_be32((__force u32)(val), __gu_p); \ break; \ case 8: \ put_unaligned_be64((__force u64)(val), __gu_p); \ break; \ default: \ __bad_unaligned_access_size(); \ break; \ } \ (void)0; }) #endif / _ASM_C6X_UNALIGNED_H / ��include/asm/asm-offsets.h��0000644��00000000043�14722072070�0011345 0��ustar�00��#include <generated/asm-offsets.h> ��include/asm/elf.h��0000644��00000006041�14722072070�0007670 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) / #ifndef _ASM_C6X_ELF_H #define _ASM_C6X_ELF_H / * ELF register definitions.. / #include <asm/ptrace.h> typedef unsigned long elf_greg_t; typedef unsigned long elf_fpreg_t; #define ELF_NGREG 58 #define ELF_NFPREG 1 typedef elf_greg_t elf_gregset_t[ELF_NGREG]; typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; / * This is used to ensure we don't load something for the wrong architecture. / #define elf_check_arch(x) ((x)->e_machine == EM_TI_C6000) #define elf_check_fdpic(x) (1) #define elf_check_const_displacement(x) (0) #define ELF_FDPIC_PLAT_INIT(_regs, _exec_map, _interp_map, _dynamic_addr) \ do { \ _regs->b4 = (_exec_map); \ _regs->a6 = (_interp_map); \ _regs->b6 = (_dynamic_addr); \ } while (0) #define ELF_FDPIC_CORE_EFLAGS 0 #define ELF_CORE_COPY_FPREGS(...) 0 / No FPU regs to copy / / * These are used to set parameters in the core dumps. / #ifdef __LITTLE_ENDIAN__ #define ELF_DATA ELFDATA2LSB #else #define ELF_DATA ELFDATA2MSB #endif #define ELF_CLASS ELFCLASS32 #define ELF_ARCH EM_TI_C6000 / Nothing for now. Need to setup DP... / #define ELF_PLAT_INIT(_r) #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 4096 #define ELF_CORE_COPY_REGS(_dest, _regs) \ memcpy((char ) &_dest, (char ) _regs, \ sizeof(struct pt_regs)); / This yields a mask that user programs can use to figure out what instruction set this cpu supports. / #define ELF_HWCAP (0) / This yields a string that ld.so will use to load implementation specific libraries for optimization. This is more specific in intent than poking at uname or /proc/cpuinfo. / #define ELF_PLATFORM (NULL) / C6X specific section types / #define SHT_C6000_UNWIND 0x70000001 #define SHT_C6000_PREEMPTMAP 0x70000002 #define SHT_C6000_ATTRIBUTES 0x70000003 / C6X specific DT_ tags / #define DT_C6000_DSBT_BASE 0x70000000 #define DT_C6000_DSBT_SIZE 0x70000001 #define DT_C6000_PREEMPTMAP 0x70000002 #define DT_C6000_DSBT_INDEX 0x70000003 / C6X specific relocs / #define R_C6000_NONE 0 #define R_C6000_ABS32 1 #define R_C6000_ABS16 2 #define R_C6000_ABS8 3 #define R_C6000_PCR_S21 4 #define R_C6000_PCR_S12 5 #define R_C6000_PCR_S10 6 #define R_C6000_PCR_S7 7 #define R_C6000_ABS_S16 8 #define R_C6000_ABS_L16 9 #define R_C6000_ABS_H16 10 #define R_C6000_SBR_U15_B 11 #define R_C6000_SBR_U15_H 12 #define R_C6000_SBR_U15_W 13 #define R_C6000_SBR_S16 14 #define R_C6000_SBR_L16_B 15 #define R_C6000_SBR_L16_H 16 #define R_C6000_SBR_L16_W 17 #define R_C6000_SBR_H16_B 18 #define R_C6000_SBR_H16_H 19 #define R_C6000_SBR_H16_W 20 #define R_C6000_SBR_GOT_U15_W 21 #define R_C6000_SBR_GOT_L16_W 22 #define R_C6000_SBR_GOT_H16_W 23 #define R_C6000_DSBT_INDEX 24 #define R_C6000_PREL31 25 #define R_C6000_COPY 26 #define R_C6000_ALIGN 253 #define R_C6000_FPHEAD 254 #define R_C6000_NOCMP 255 #endif /_ASM_C6X_ELF_H / ��include/asm/dscr.h��0000644��00000001365�14722072070�0010061 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Copyright (C) 2011 Texas Instruments Incorporated * Author: Mark Salter <msalter@redhat.com> / #ifndef _ASM_C6X_DSCR_H #define _ASM_C6X_DSCR_H enum dscr_devstate_t { DSCR_DEVSTATE_ENABLED, DSCR_DEVSTATE_DISABLED, }; / * Set the device state of the device with the given ID. * * Individual drivers should use this to enable or disable the * hardware device. The devid used to identify the device being * controlled should be a property in the device's tree node. / extern void dscr_set_devstate(int devid, enum dscr_devstate_t state); / * Assert or de-assert an RMII reset. / extern void dscr_rmii_reset(int id, int assert); extern void dscr_probe(void); #endif / _ASM_C6X_DSCR_H / ��include/asm/irqflags.h��0000644��00000002741�14722072070�0010735 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-or-later / / * C6X IRQ flag handling * * Copyright (C) 2010 Texas Instruments Incorporated * Written by Mark Salter (msalter@redhat.com) / #ifndef _ASM_IRQFLAGS_H #define _ASM_IRQFLAGS_H #ifndef __ASSEMBLY__ / read interrupt enabled status / static inline unsigned long arch_local_save_flags(void) { unsigned long flags; asm volatile (" mvc .s2 CSR,%0\n" : "=b"(flags)); return flags; } / set interrupt enabled status / static inline void arch_local_irq_restore(unsigned long flags) { asm volatile (" mvc .s2 %0,CSR\n" : : "b"(flags) : "memory"); } / unconditionally enable interrupts / static inline void arch_local_irq_enable(void) { unsigned long flags = arch_local_save_flags(); flags \|= 1; arch_local_irq_restore(flags); } / unconditionally disable interrupts / static inline void arch_local_irq_disable(void) { unsigned long flags = arch_local_save_flags(); flags &= ~1; arch_local_irq_restore(flags); } / get status and disable interrupts / static inline unsigned long arch_local_irq_save(void) { unsigned long flags; flags = arch_local_save_flags(); arch_local_irq_restore(flags & ~1); return flags; } / test flags / static inline int arch_irqs_disabled_flags(unsigned long flags) { return (flags & 1) == 0; } / test hardware interrupt enable bit / static inline int arch_irqs_disabled(void) { return arch_irqs_disabled_flags(arch_local_save_flags()); } #endif / __ASSEMBLY__ / #endif / __ASM_IRQFLAGS_H / ��include/asm/special_insns.h��0000644��00000003264�14722072070�0011760 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) / #ifndef _ASM_C6X_SPECIAL_INSNS_H #define _ASM_C6X_SPECIAL_INSNS_H #define get_creg(reg) \ ({ unsigned int __x; \ asm volatile ("mvc .s2 " #reg ",%0\n" : "=b"(__x)); __x; }) #define set_creg(reg, v) \ do { unsigned int __x = (unsigned int)(v); \ asm volatile ("mvc .s2 %0," #reg "\n" : : "b"(__x)); \ } while (0) #define or_creg(reg, n) \ do { unsigned __x, __n = (unsigned)(n); \ asm volatile ("mvc .s2 " #reg ",%0\n" \ "or .l2 %1,%0,%0\n" \ "mvc .s2 %0," #reg "\n" \ "nop\n" \ : "=&b"(__x) : "b"(__n)); \ } while (0) #define and_creg(reg, n) \ do { unsigned __x, __n = (unsigned)(n); \ asm volatile ("mvc .s2 " #reg ",%0\n" \ "and .l2 %1,%0,%0\n" \ "mvc .s2 %0," #reg "\n" \ "nop\n" \ : "=&b"(__x) : "b"(__n)); \ } while (0) #define get_coreid() (get_creg(DNUM) & 0xff) / Set/get IST / #define set_ist(x) set_creg(ISTP, x) #define get_ist() get_creg(ISTP) / * Exception management / #define disable_exception() #define get_except_type() get_creg(EFR) #define ack_exception(type) set_creg(ECR, 1 << (type)) #define get_iexcept() get_creg(IERR) #define set_iexcept(mask) set_creg(IERR, (mask)) #define _extu(x, s, e) \ ({ unsigned int __x; \ asm volatile ("extu .S2 %3,%1,%2,%0\n" : \ "=b"(__x) : "n"(s), "n"(e), "b"(x)); \ __x; }) #endif / _ASM_C6X_SPECIAL_INSNS_H / ��include/asm/pgtable.h��0000644��00000004072�14722072070�0010542 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) / #ifndef _ASM_C6X_PGTABLE_H #define _ASM_C6X_PGTABLE_H #include <asm-generic/4level-fixup.h> #include <asm/setup.h> #include <asm/page.h> / * All 32bit addresses are effectively valid for vmalloc... * Sort of meaningless for non-VM targets. / #define VMALLOC_START 0 #define VMALLOC_END 0xffffffff #define pgd_present(pgd) (1) #define pgd_none(pgd) (0) #define pgd_bad(pgd) (0) #define pgd_clear(pgdp) #define kern_addr_valid(addr) (1) #define pmd_offset(a, b) ((void )0) #define pmd_none(x) (!pmd_val(x)) #define pmd_present(x) (pmd_val(x)) #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) #define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK) #define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM / #define PAGE_SHARED __pgprot(0) / these mean nothing to NO_MM / #define PAGE_COPY __pgprot(0) / these mean nothing to NO_MM / #define PAGE_READONLY __pgprot(0) / these mean nothing to NO_MM / #define PAGE_KERNEL __pgprot(0) / these mean nothing to NO_MM / #define pgprot_noncached(prot) (prot) extern void paging_init(void); #define __swp_type(x) (0) #define __swp_offset(x) (0) #define __swp_entry(typ, off) ((swp_entry_t) { ((typ) \| ((off) << 7)) }) #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) #define set_pte(pteptr, pteval) ((pteptr) = pteval) #define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval) /* * ZERO_PAGE is a global shared page that is always zero: used * for zero-mapped memory areas etc.. / #define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page) extern unsigned long empty_zero_page; #define swapper_pg_dir ((pgd_t ) 0) /* * c6x is !MMU, so define the simpliest implementation / #define pgprot_writecombine pgprot_noncached #include <asm-generic/pgtable.h> #endif / _ASM_C6X_PGTABLE_H / ��include/asm/ftrace.h��0000644��00000000141�14722072070�0010361 0��ustar�00��#ifndef _ASM_C6X_FTRACE_H #define _ASM_C6X_FTRACE_H / empty / #endif / _ASM_C6X_FTRACE_H / ��include/asm/hardirq.h��0000644��00000000647�14722072070�0010562 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) / #ifndef _ASM_C6X_HARDIRQ_H #define _ASM_C6X_HARDIRQ_H extern void ack_bad_irq(int irq); #define ack_bad_irq ack_bad_irq #include <asm-generic/hardirq.h> #endif / _ASM_C6X_HARDIRQ_H / ��include/asm/module.h��0000644��00000000752�14722072070�0010412 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) * * Updated for 2.6.34 by: Mark Salter (msalter@redhat.com) / #ifndef _ASM_C6X_MODULE_H #define _ASM_C6X_MODULE_H #include <asm-generic/module.h> struct loaded_sections { unsigned int new_vaddr; unsigned int loaded; }; #endif / _ASM_C6X_MODULE_H / ��include/asm/delay.h��0000644��00000003024�14722072070�0010216 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) / #ifndef _ASM_C6X_DELAY_H #define _ASM_C6X_DELAY_H #include <linux/kernel.h> extern unsigned int ticks_per_ns_scaled; static inline void __delay(unsigned long loops) { uint32_t tmp; / 6 cycles per loop / asm volatile (" mv .s1 %0,%1\n" "0: [%1] b .s1 0b\n" " add .l1 -6,%0,%0\n" " cmplt .l1 1,%0,%1\n" " nop 3\n" : "+a"(loops), "=A"(tmp)); } static inline void _c6x_tickdelay(unsigned int x) { uint32_t cnt, endcnt; asm volatile (" mvc .s2 TSCL,%0\n" " add .s2x %0,%1,%2\n" " \|\| mvk .l2 1,B0\n" "0: [B0] b .s2 0b\n" " mvc .s2 TSCL,%0\n" " sub .s2 %0,%2,%0\n" " cmpgt .l2 0,%0,B0\n" " nop 2\n" : "=b"(cnt), "+a"(x), "=b"(endcnt) : : "B0"); } / use scaled math to avoid slow division / #define C6X_NDELAY_SCALE 10 static inline void _ndelay(unsigned int n) { _c6x_tickdelay((ticks_per_ns_scaled n) >> C6X_NDELAY_SCALE); } static inline void _udelay(unsigned int n) { while (n >= 10) { _ndelay(10000); n -= 10; } while (n-- > 0) _ndelay(1000); } #define udelay(x) _udelay((unsigned int)(x)) #define ndelay(x) _ndelay((unsigned int)(x)) #endif /* _ASM_C6X_DELAY_H / ��include/asm/switch_to.h��0000644��00000001513�14722072070�0011124 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) / #ifndef _ASM_C6X_SWITCH_TO_H #define _ASM_C6X_SWITCH_TO_H #include <linux/linkage.h> #define prepare_to_switch() do { } while (0) struct task_struct; struct thread_struct; asmlinkage void __switch_to(struct thread_struct prev, struct thread_struct next, struct task_struct tsk); #define switch_to(prev, next, last) \ do { \ current->thread.wchan = (u_long) __builtin_return_address(0); \ (last) = __switch_to(&(prev)->thread, \ &(next)->thread, (prev)); \ mb(); \ current->thread.wchan = 0; \ } while (0) #endif / _ASM_C6X_SWITCH_TO_H / ��include/asm/soc.h��0000644��00000001641�14722072070�0007707 0��ustar�00��/ * Miscellaneous SoC-specific hooks. * * Copyright (C) 2011 Texas Instruments Incorporated * * Author: Mark Salter <msalter@redhat.com> * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any * kind, whether express or implied. / #ifndef _ASM_C6X_SOC_H #define _ASM_C6X_SOC_H struct soc_ops { / Return active exception event or -1 if none / int (get_exception)(void); /* Assert an event / void (assert_event)(unsigned int evt); }; extern struct soc_ops soc_ops; extern int soc_get_exception(void); extern void soc_assert_event(unsigned int event); extern int soc_mac_addr(unsigned int index, u8 addr); / * for mmio on SoC devices. regs are always same byte order as cpu. / #define soc_readl(addr) __raw_readl(addr) #define soc_writel(b, addr) __raw_writel((b), (addr)) #endif / _ASM_C6X_SOC_H / ��include/asm/syscalls.h��0000644��00000003355�14722072070�0010764 0��ustar�00��/ * Copyright (C) 2011 Texas Instruments Incorporated * Author: Mark Salter <msalter@redhat.com> * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation, version 2. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or * NON INFRINGEMENT. See the GNU General Public License for * more details. / #ifndef __ASM_C6X_SYSCALLS_H #define __ASM_C6X_SYSCALLS_H #include <linux/compiler.h> #include <linux/linkage.h> #include <linux/types.h> / The array of function pointers for syscalls. / extern void sys_call_table[]; /* The following are trampolines in entry.S to handle 64-bit arguments / extern long sys_pread_c6x(unsigned int fd, char __user buf, size_t count, off_t pos_low, off_t pos_high); extern long sys_pwrite_c6x(unsigned int fd, const char __user buf, size_t count, off_t pos_low, off_t pos_high); extern long sys_truncate64_c6x(const char __user path, off_t length_low, off_t length_high); extern long sys_ftruncate64_c6x(unsigned int fd, off_t length_low, off_t length_high); extern long sys_fadvise64_c6x(int fd, u32 offset_lo, u32 offset_hi, u32 len, int advice); extern long sys_fadvise64_64_c6x(int fd, u32 offset_lo, u32 offset_hi, u32 len_lo, u32 len_hi, int advice); extern long sys_fallocate_c6x(int fd, int mode, u32 offset_lo, u32 offset_hi, u32 len_lo, u32 len_hi); extern int sys_cache_sync(unsigned long s, unsigned long e); #include <asm-generic/syscalls.h> #endif /* __ASM_C6X_SYSCALLS_H / ��include/asm/sections.h��0000644��00000000371�14722072070�0010751 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0 / #ifndef _ASM_C6X_SECTIONS_H #define _ASM_C6X_SECTIONS_H #include <asm-generic/sections.h> extern char _vectors_start[]; extern char _vectors_end[]; extern char _data_lma[]; #endif / _ASM_C6X_SECTIONS_H / ��include/asm/flat.h��0000644��00000000657�14722072070�0010057 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0 / #ifndef __ASM_C6X_FLAT_H #define __ASM_C6X_FLAT_H #include <asm/unaligned.h> static inline int flat_get_addr_from_rp(u32 __user rp, u32 relval, u32 flags, u32 addr) { addr = get_unaligned((__force u32 )rp); return 0; } static inline int flat_put_addr_at_rp(u32 __user rp, u32 addr, u32 rel) { put_unaligned(addr, (__force u32 )rp); return 0; } #endif / __ASM_C6X_FLAT_H / ��include/asm/thread_info.h��0000644��00000004607�14722072070�0011412 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) * * Updated for 2.6.3x: Mark Salter <msalter@redhat.com> / #ifndef _ASM_C6X_THREAD_INFO_H #define _ASM_C6X_THREAD_INFO_H #ifdef __KERNEL__ #include <asm/page.h> #ifdef CONFIG_4KSTACKS #define THREAD_SIZE 4096 #define THREAD_SHIFT 12 #define THREAD_SIZE_ORDER 0 #else #define THREAD_SIZE 8192 #define THREAD_SHIFT 13 #define THREAD_SIZE_ORDER 1 #endif #define THREAD_START_SP (THREAD_SIZE - 8) #ifndef __ASSEMBLY__ typedef struct { unsigned long seg; } mm_segment_t; / * low level task data. / struct thread_info { struct task_struct task; /* main task structure / unsigned long flags; / low level flags / int cpu; / cpu we're on / int preempt_count; / 0 = preemptable, <0 = BUG / mm_segment_t addr_limit; / thread address space / }; / * macros/functions for gaining access to the thread information structure * * preempt_count needs to be 1 initially, until the scheduler is functional. / #define INIT_THREAD_INFO(tsk) \ { \ .task = &tsk, \ .flags = 0, \ .cpu = 0, \ .preempt_count = INIT_PREEMPT_COUNT, \ .addr_limit = KERNEL_DS, \ } / get the thread information struct of current task / static inline __attribute__((const)) struct thread_info current_thread_info(void) { struct thread_info ti; asm volatile (" clr .s2 B15,0,%1,%0\n" : "=b" (ti) : "Iu5" (THREAD_SHIFT - 1)); return ti; } #define get_thread_info(ti) get_task_struct((ti)->task) #define put_thread_info(ti) put_task_struct((ti)->task) #endif / __ASSEMBLY__ / / * thread information flag bit numbers * - pending work-to-be-done flags are in LSW * - other flags in MSW / #define TIF_SYSCALL_TRACE 0 / syscall trace active / #define TIF_NOTIFY_RESUME 1 / resumption notification requested / #define TIF_SIGPENDING 2 / signal pending / #define TIF_NEED_RESCHED 3 / rescheduling necessary / #define TIF_RESTORE_SIGMASK 4 / restore signal mask in do_signal() / #define TIF_MEMDIE 17 / OOM killer killed process / #define TIF_WORK_MASK 0x00007FFE / work on irq/exception return / #define TIF_ALLWORK_MASK 0x00007FFF / work on any return to u-space / #endif / __KERNEL__ / #endif / _ASM_C6X_THREAD_INFO_H / ��include/asm/tlb.h��0000644��00000000220�14722072070�0007674 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0 / #ifndef _ASM_C6X_TLB_H #define _ASM_C6X_TLB_H #include <asm-generic/tlb.h> #endif / _ASM_C6X_TLB_H / ��include/asm/timer64.h��0000644��00000000232�14722072070�0010410 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0 / #ifndef _C6X_TIMER64_H #define _C6X_TIMER64_H extern void __init timer64_init(void); #endif / _C6X_TIMER64_H / ��include/asm/clock.h��0000644��00000006566�14722072070�0010231 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * TI C64X clock definitions * * Copyright (C) 2010, 2011 Texas Instruments. * Contributed by: Mark Salter <msalter@redhat.com> * * Copied heavily from arm/mach-davinci/clock.h, so: * * Copyright (C) 2006-2007 Texas Instruments. * Copyright (C) 2008-2009 Deep Root Systems, LLC / #ifndef _ASM_C6X_CLOCK_H #define _ASM_C6X_CLOCK_H #ifndef __ASSEMBLER__ #include <linux/list.h> / PLL/Reset register offsets / #define PLLCTL 0x100 #define PLLM 0x110 #define PLLPRE 0x114 #define PLLDIV1 0x118 #define PLLDIV2 0x11c #define PLLDIV3 0x120 #define PLLPOST 0x128 #define PLLCMD 0x138 #define PLLSTAT 0x13c #define PLLALNCTL 0x140 #define PLLDCHANGE 0x144 #define PLLCKEN 0x148 #define PLLCKSTAT 0x14c #define PLLSYSTAT 0x150 #define PLLDIV4 0x160 #define PLLDIV5 0x164 #define PLLDIV6 0x168 #define PLLDIV7 0x16c #define PLLDIV8 0x170 #define PLLDIV9 0x174 #define PLLDIV10 0x178 #define PLLDIV11 0x17c #define PLLDIV12 0x180 #define PLLDIV13 0x184 #define PLLDIV14 0x188 #define PLLDIV15 0x18c #define PLLDIV16 0x190 / PLLM register bits / #define PLLM_PLLM_MASK 0xff #define PLLM_VAL(x) ((x) - 1) / PREDIV register bits / #define PLLPREDIV_EN BIT(15) #define PLLPREDIV_VAL(x) ((x) - 1) / PLLCTL register bits / #define PLLCTL_PLLEN BIT(0) #define PLLCTL_PLLPWRDN BIT(1) #define PLLCTL_PLLRST BIT(3) #define PLLCTL_PLLDIS BIT(4) #define PLLCTL_PLLENSRC BIT(5) #define PLLCTL_CLKMODE BIT(8) / PLLCMD register bits / #define PLLCMD_GOSTAT BIT(0) / PLLSTAT register bits / #define PLLSTAT_GOSTAT BIT(0) / PLLDIV register bits / #define PLLDIV_EN BIT(15) #define PLLDIV_RATIO_MASK 0x1f #define PLLDIV_RATIO(x) ((x) - 1) struct pll_data; struct clk { struct list_head node; struct module owner; const char name; unsigned long rate; int usecount; u32 flags; struct clk parent; struct list_head children; /* list of children / struct list_head childnode; / parent's child list node / struct pll_data pll_data; u32 div; unsigned long (recalc) (struct clk ); int (set_rate) (struct clk clk, unsigned long rate); int (round_rate) (struct clk clk, unsigned long rate); }; /* Clock flags: SoC-specific flags start at BIT(16) / #define ALWAYS_ENABLED BIT(1) #define CLK_PLL BIT(2) / PLL-derived clock / #define PRE_PLL BIT(3) / source is before PLL mult/div / #define FIXED_DIV_PLL BIT(4) / fixed divisor from PLL / #define FIXED_RATE_PLL BIT(5) / fixed output rate PLL / #define MAX_PLL_SYSCLKS 16 struct pll_data { void __iomem base; u32 num; u32 flags; u32 input_rate; u32 bypass_delay; /* in loops / u32 reset_delay; / in loops / u32 lock_delay; / in loops / struct clk sysclks[MAX_PLL_SYSCLKS + 1]; }; / pll_data flag bit / #define PLL_HAS_PRE BIT(0) #define PLL_HAS_MUL BIT(1) #define PLL_HAS_POST BIT(2) #define CLK(dev, con, ck) \ { \ .dev_id = dev, \ .con_id = con, \ .clk = ck, \ } \ extern void c6x_clks_init(struct clk_lookup clocks); extern int clk_register(struct clk clk); extern void clk_unregister(struct clk clk); extern void c64x_setup_clocks(void); extern struct pll_data c6x_soc_pll1; extern struct clk clkin1; extern struct clk c6x_core_clk; extern struct clk c6x_i2c_clk; extern struct clk c6x_watchdog_clk; extern struct clk c6x_mcbsp1_clk; extern struct clk c6x_mcbsp2_clk; extern struct clk c6x_mdio_clk; #endif #endif /* _ASM_C6X_CLOCK_H / ��include/asm/processor.h��0000644��00000005712�14722072070�0011145 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) * * Updated for 2.6.34: Mark Salter <msalter@redhat.com> / #ifndef _ASM_C6X_PROCESSOR_H #define _ASM_C6X_PROCESSOR_H #include <asm/ptrace.h> #include <asm/page.h> #include <asm/current.h> / * User space process size. This is mostly meaningless for NOMMU * but some C6X processors may have RAM addresses up to 0xFFFFFFFF. * Since calls like mmap() can return an address or an error, we * have to allow room for error returns when code does something * like: * * addr = do_mmap(...) * if ((unsigned long)addr >= TASK_SIZE) * ... its an error code, not an address ... * * Here, we allow for 4096 error codes which means we really can't * use the last 4K page on systems with RAM extending all the way * to the end of the 32-bit address space. / #define TASK_SIZE 0xFFFFF000 / * This decides where the kernel will search for a free chunk of vm * space during mmap's. We won't be using it / #define TASK_UNMAPPED_BASE 0 struct thread_struct { unsigned long long b15_14; unsigned long long a15_14; unsigned long long b13_12; unsigned long long a13_12; unsigned long long b11_10; unsigned long long a11_10; unsigned long long ricl_icl; unsigned long usp; / user stack pointer / unsigned long pc; / kernel pc / unsigned long wchan; }; #define INIT_THREAD \ { \ .usp = 0, \ .wchan = 0, \ } #define INIT_MMAP { \ &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ \| VM_WRITE \| VM_EXEC, 1, \ NULL, NULL } #define task_pt_regs(task) \ ((struct pt_regs )(THREAD_START_SP + task_stack_page(task)) - 1) #define alloc_kernel_stack() __get_free_page(GFP_KERNEL) #define free_kernel_stack(page) free_page((page)) /* Forward declaration, a strange C thing / struct task_struct; extern void start_thread(struct pt_regs regs, unsigned int pc, unsigned long usp); /* Free all resources held by a thread. / static inline void release_thread(struct task_struct dead_task) { } /* * saved kernel SP and DP of a blocked thread. / #ifdef _BIG_ENDIAN #define thread_saved_ksp(tsk) \ ((unsigned long )&(tsk)->thread.b15_14) #define thread_saved_dp(tsk) \ ((((unsigned long )&(tsk)->thread.b15_14) + 1)) #else #define thread_saved_ksp(tsk) \ ((((unsigned long )&(tsk)->thread.b15_14) + 1)) #define thread_saved_dp(tsk) \ ((unsigned long )&(tsk)->thread.b15_14) #endif extern unsigned long get_wchan(struct task_struct p); #define KSTK_EIP(task) (task_pt_regs(task)->pc) #define KSTK_ESP(task) (task_pt_regs(task)->sp) #define cpu_relax() do { } while (0) extern const struct seq_operations cpuinfo_op; /* Reset the board / #define HARD_RESET_NOW() extern unsigned int c6x_core_freq; extern void (c6x_restart)(void); extern void (c6x_halt)(void); #endif / ASM_C6X_PROCESSOR_H / ��include/asm/Kbuild��0000644��00000001716�14722072070�0010112 0��ustar�00��# SPDX-License-Identifier: GPL-2.0 generic-y += atomic.h generic-y += barrier.h generic-y += bugs.h generic-y += compat.h generic-y += current.h generic-y += device.h generic-y += div64.h generic-y += dma.h generic-y += dma-mapping.h generic-y += emergency-restart.h generic-y += exec.h generic-y += extable.h generic-y += fb.h generic-y += futex.h generic-y += hw_irq.h generic-y += io.h generic-y += irq_regs.h generic-y += irq_work.h generic-y += kdebug.h generic-y += kmap_types.h generic-y += kprobes.h generic-y += kvm_para.h generic-y += local.h generic-y += mcs_spinlock.h generic-y += mm-arch-hooks.h generic-y += mmiowb.h generic-y += mmu.h generic-y += mmu_context.h generic-y += pci.h generic-y += percpu.h generic-y += pgalloc.h generic-y += preempt.h generic-y += serial.h generic-y += shmparam.h generic-y += tlbflush.h generic-y += topology.h generic-y += trace_clock.h generic-y += user.h generic-y += vga.h generic-y += word-at-a-time.h generic-y += xor.h ��include/asm/ptrace.h��0000644��00000001521�14722072070�0010376 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Copyright (C) 2004, 2006, 2009, 2010 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) * * Updated for 2.6.34: Mark Salter <msalter@redhat.com> / #ifndef _ASM_C6X_PTRACE_H #define _ASM_C6X_PTRACE_H #include <uapi/asm/ptrace.h> #ifndef __ASSEMBLY__ #ifdef _BIG_ENDIAN #else #endif #include <linux/linkage.h> #define user_mode(regs) ((((regs)->tsr) & 0x40) != 0) #define instruction_pointer(regs) ((regs)->pc) #define profile_pc(regs) instruction_pointer(regs) #define user_stack_pointer(regs) ((regs)->sp) extern void show_regs(struct pt_regs ); extern asmlinkage unsigned long syscall_trace_entry(struct pt_regs regs); extern asmlinkage void syscall_trace_exit(struct pt_regs regs); #endif /* __ASSEMBLY__ / #endif / _ASM_C6X_PTRACE_H / ��include/asm/cmpxchg.h��0000644��00000002657�14722072070�0010564 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) / #ifndef _ASM_C6X_CMPXCHG_H #define _ASM_C6X_CMPXCHG_H #include <linux/irqflags.h> / * Misc. functions / static inline unsigned int __xchg(unsigned int x, volatile void ptr, int size) { unsigned int tmp; unsigned long flags; local_irq_save(flags); switch (size) { case 1: tmp = 0; tmp = ((unsigned char ) ptr); ((unsigned char ) ptr) = (unsigned char) x; break; case 2: tmp = 0; tmp = ((unsigned short ) ptr); ((unsigned short ) ptr) = x; break; case 4: tmp = 0; tmp = ((unsigned int ) ptr); ((unsigned int ) ptr) = x; break; } local_irq_restore(flags); return tmp; } #define xchg(ptr, x) \ ((__typeof__((ptr)))__xchg((unsigned int)(x), (void ) (ptr), \ sizeof((ptr)))) #include <asm-generic/cmpxchg-local.h> / * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make * them available. / #define cmpxchg_local(ptr, o, n) \ ((__typeof__((ptr)))__cmpxchg_local_generic((ptr), \ (unsigned long)(o), \ (unsigned long)(n), \ sizeof((ptr)))) #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) #include <asm-generic/cmpxchg.h> #endif / _ASM_C6X_CMPXCHG_H / ��include/asm/checksum.h��0000644��00000001436�14722072070�0010727 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Copyright (C) 2011 Texas Instruments Incorporated * Author: Mark Salter <msalter@redhat.com> / #ifndef _ASM_C6X_CHECKSUM_H #define _ASM_C6X_CHECKSUM_H static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, __u32 len, __u8 proto, __wsum sum) { unsigned long long tmp; asm ("add .d1 %1,%5,%1\n" "\|\| addu .l1 %3,%4,%0\n" "addu .l1 %2,%0,%0\n" #ifndef CONFIG_CPU_BIG_ENDIAN "\|\| shl .s1 %1,8,%1\n" #endif "addu .l1 %1,%0,%0\n" "add .l1 %P0,%p0,%2\n" : "=&a"(tmp), "+a"(len), "+a"(sum) : "a" (saddr), "a" (daddr), "a" (proto)); return sum; } #define csum_tcpudp_nofold csum_tcpudp_nofold #include <asm-generic/checksum.h> #endif / _ASM_C6X_CHECKSUM_H / ��include/asm/traps.h��0000644��00000002223�14722072070�0010251 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2009, 2011 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) / #ifndef _ASM_C6X_TRAPS_H #define _ASM_C6X_TRAPS_H #define EXCEPT_TYPE_NXF 31 / NMI / #define EXCEPT_TYPE_EXC 30 / external exception / #define EXCEPT_TYPE_IXF 1 / internal exception / #define EXCEPT_TYPE_SXF 0 / software exception / #define EXCEPT_CAUSE_LBX (1 << 7) / loop buffer exception / #define EXCEPT_CAUSE_PRX (1 << 6) / privilege exception / #define EXCEPT_CAUSE_RAX (1 << 5) / resource access exception / #define EXCEPT_CAUSE_RCX (1 << 4) / resource conflict exception / #define EXCEPT_CAUSE_OPX (1 << 3) / opcode exception / #define EXCEPT_CAUSE_EPX (1 << 2) / execute packet exception / #define EXCEPT_CAUSE_FPX (1 << 1) / fetch packet exception / #define EXCEPT_CAUSE_IFX (1 << 0) / instruction fetch exception / struct exception_info { char kernel_str; int signo; int code; }; extern int (c6x_nmi_handler)(struct pt_regs regs); #endif /* _ASM_C6X_TRAPS_H / ��include/asm/linkage.h��0000644��00000000761�14722072070�0010537 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0 / #ifndef _ASM_C6X_LINKAGE_H #define _ASM_C6X_LINKAGE_H #ifdef __ASSEMBLER__ #define __ALIGN .align 2 #define __ALIGN_STR ".align 2" #ifndef __DSBT__ #define ENTRY(name) \ .global name @ \ __ALIGN @ \ name: #else #define ENTRY(name) \ .global name @ \ .hidden name @ \ __ALIGN @ \ name: #endif #define ENDPROC(name) \ .type name, @function @ \ .size name, . - name #endif #include <asm-generic/linkage.h> #endif / _ASM_C6X_LINKAGE_H / ��include/asm/string.h��0000644��00000000723�14722072070�0010431 0��ustar�00��/ SPDX-License-Identifier: GPL-2.0-only / / * Port on Texas Instruments TMS320C6x architecture * * Copyright (C) 2004, 2009, 2011 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) / #ifndef _ASM_C6X_STRING_H #define _ASM_C6X_STRING_H #include <asm/page.h> #include <linux/linkage.h> asmlinkage extern void memcpy(void to, const void from, size_t n); #define __HAVE_ARCH_MEMCPY #endif /* _ASM_C6X_STRING_H */ ��Kconfig.debug��0000644��00000000435�14722072070�0007137 0��ustar�00��# SPDX-License-Identifier: GPL-2.0 config ACCESS_CHECK bool "Check the user pointer address" default y help Usually the pointer transfer from user space is checked to see if its address is in the kernel space. Say N here to disable that check to improve the performance. ��boot/dts/Makefile��0000644��00000000554�14722072070�0007746 0��ustar�00��# SPDX-License-Identifier: GPL-2.0 # # Makefile for device trees # DTC_FLAGS ?= -p 1024 dtb-$(CONFIG_SOC_TMS320C6455) += dsk6455.dtb dtb-$(CONFIG_SOC_TMS320C6457) += evmc6457.dtb dtb-$(CONFIG_SOC_TMS320C6472) += evmc6472.dtb dtb-$(CONFIG_SOC_TMS320C6474) += evmc6474.dtb dtb-$(CONFIG_SOC_TMS320C6678) += evmc6678.dtb ifneq ($(DTB),) obj-y += $(DTB).dtb.o endif ��boot/Makefile��0000644��00000000352�14722072070�0007150 0��ustar�00��# SPDX-License-Identifier: GPL-2.0 # # Makefile for bootable kernel images # OBJCOPYFLAGS_vmlinux.bin := -O binary $(obj)/vmlinux.bin: vmlinux FORCE $(call if_changed,objcopy) $(obj)/dtbImage.%: vmlinux $(call if_changed,objcopy) ��platforms/Kconfig��0000644��00000000466�14722072070�0010065 0��ustar�00��# SPDX-License-Identifier: GPL-2.0 config SOC_TMS320C6455 bool "TMS320C6455" default n config SOC_TMS320C6457 bool "TMS320C6457" default n config SOC_TMS320C6472 bool "TMS320C6472" default n config SOC_TMS320C6474 bool "TMS320C6474" default n config SOC_TMS320C6678 bool "TMS320C6678" default n ��platforms/Makefile��0000644��00000000462�14722072070�0010216 0��ustar�00��# SPDX-License-Identifier: GPL-2.0-only # # Makefile for arch/c6x/platforms # # Copyright 2010, 2011 Texas Instruments Incorporated # obj-y = cache.o megamod-pic.o pll.o plldata.o timer64.o obj-y += dscr.o # SoC objects obj-$(CONFIG_SOC_TMS320C6455) += emif.o obj-$(CONFIG_SOC_TMS320C6457) += emif.o ��Kconfig��0000644��00000005757�14722072070�0006066 0��ustar�00��# SPDX-License-Identifier: GPL-2.0 # # For a description of the syntax of this configuration file, # see Documentation/kbuild/kconfig-language.rst. # config C6X def_bool y select ARCH_32BIT_OFF_T select ARCH_HAS_BINFMT_FLAT select ARCH_HAS_SYNC_DMA_FOR_CPU select ARCH_HAS_SYNC_DMA_FOR_DEVICE select CLKDEV_LOOKUP select GENERIC_ATOMIC64 select GENERIC_IRQ_SHOW select HAVE_ARCH_TRACEHOOK select SPARSE_IRQ select IRQ_DOMAIN select OF select OF_EARLY_FLATTREE select GENERIC_CLOCKEVENTS select MODULES_USE_ELF_RELA select MMU_GATHER_NO_RANGE if MMU config MMU def_bool n config FPU def_bool n config GENERIC_CALIBRATE_DELAY def_bool y config GENERIC_HWEIGHT def_bool y config GENERIC_BUG def_bool y depends on BUG config C6X_BIG_KERNEL bool "Build a big kernel" help The C6X function call instruction has a limited range of +/- 2MiB. This is sufficient for most kernels, but some kernel configurations with lots of compiled-in functionality may require a larger range for function calls. Use this option to have the compiler generate function calls with 32-bit range. This will make the kernel both larger and slower. If unsure, say N. # Use the generic interrupt handling code in kernel/irq/ config CMDLINE_BOOL bool "Default bootloader kernel arguments" config CMDLINE string "Kernel command line" depends on CMDLINE_BOOL default "console=ttyS0,57600" help On some architectures there is currently no way for the boot loader to pass arguments to the kernel. For these architectures, you should supply some command-line options at build time by entering them here. config CMDLINE_FORCE bool "Force default kernel command string" depends on CMDLINE_BOOL default n help Set this to have arguments from the default kernel command string override those passed by the boot loader. config CPU_BIG_ENDIAN bool "Build big-endian kernel" default n help Say Y if you plan on running a kernel in big-endian mode. Note that your board must be properly built and your board port must properly enable any big-endian related features of your chipset/board/processor. config FORCE_MAX_ZONEORDER int "Maximum zone order" default "13" help The kernel memory allocator divides physically contiguous memory blocks into "zones", where each zone is a power of two number of pages. This option selects the largest power of two that the kernel keeps in the memory allocator. If you need to allocate very large blocks of physically contiguous memory, then you may need to increase this value. This config option is actually maximum order plus one. For example, a value of 11 means that the largest free memory block is 2^10 pages. menu "Processor type and features" source "arch/c6x/platforms/Kconfig" config KERNEL_RAM_BASE_ADDRESS hex "Virtual address of memory base" default 0xe0000000 if SOC_TMS320C6455 default 0xe0000000 if SOC_TMS320C6457 default 0xe0000000 if SOC_TMS320C6472 default 0x80000000 source "kernel/Kconfig.hz" endmenu ��mm/Makefile��0000644��00000000217�14722072070�0006616 0��ustar�00��# SPDX-License-Identifier: GPL-2.0-only # # Makefile for the linux c6x-specific parts of the memory manager. # obj-y := init.o dma-coherent.o ��lib/Makefile��0000644��00000000427�14722072070�0006756 0��ustar�00��# SPDX-License-Identifier: GPL-2.0-only # # Makefile for arch/c6x/lib/ # lib-y := divu.o divi.o pop_rts.o push_rts.o remi.o remu.o strasgi.o llshru.o lib-y += llshr.o llshl.o negll.o mpyll.o divremi.o divremu.o lib-y += checksum.o csum_64plus.o memcpy_64plus.o strasgi_64plus.o ��Makefile��0000644��00000003073�14722072070�0006210 0��ustar�00��# # linux/arch/c6x/Makefile # # This file is subject to the terms and conditions of the GNU General Public # License. See the file "COPYING" in the main directory of this archive # for more details. # KBUILD_DEFCONFIG := dsk6455_defconfig cflags-y += -mno-dsbt -msdata=none -D__linux__ cflags-$(CONFIG_C6X_BIG_KERNEL) += -mlong-calls KBUILD_CFLAGS_MODULE += -mlong-calls -mno-dsbt -msdata=none CHECKFLAGS += KBUILD_CFLAGS += $(cflags-y) KBUILD_AFLAGS += $(cflags-y) ifdef CONFIG_CPU_BIG_ENDIAN KBUILD_CFLAGS += -mbig-endian KBUILD_AFLAGS += -mbig-endian LINKFLAGS += -mbig-endian KBUILD_LDFLAGS += -mbig-endian -EB CHECKFLAGS += -D_BIG_ENDIAN endif head-y := arch/c6x/kernel/head.o core-y += arch/c6x/kernel/ arch/c6x/mm/ arch/c6x/platforms/ libs-y += arch/c6x/lib/ # Default to vmlinux.bin, override when needed all: vmlinux.bin boot := arch/$(ARCH)/boot # Are we making a dtbImage.<boardname> target? If so, crack out the boardname DTB:=$(subst dtbImage.,,$(filter dtbImage.%, $(MAKECMDGOALS))) export DTB core-y += $(boot)/dts/ # With make 3.82 we cannot mix normal and wildcard targets vmlinux.bin: vmlinux $(Q)$(MAKE) $(build)=$(boot) $(patsubst %,$(boot)/%,$@) dtbImage.%: vmlinux $(Q)$(MAKE) $(build)=$(boot) $(patsubst %,$(boot)/%,$@) archclean: $(Q)$(MAKE) $(clean)=$(boot) define archhelp @echo ' vmlinux.bin - Binary kernel image (arch/$(ARCH)/boot/vmlinux.bin)' @echo ' dtbImage.<dt> - ELF image with $(arch)/boot/dts/<dt>.dts linked in' @echo ' - stripped elf with fdt blob' endef ��kernel/Makefile��0000644��00000000470�14722072070�0007466 0��ustar�00��# SPDX-License-Identifier: GPL-2.0 # # Makefile for arch/c6x/kernel/ # extra-y := head.o vmlinux.lds obj-y := process.o traps.o irq.o signal.o ptrace.o obj-y += setup.o sys_c6x.o time.o devicetree.o obj-y += switch_to.o entry.o vectors.o c6x_ksyms.o obj-y += soc.o obj-$(CONFIG_MODULES) += module.o ��

| ver. 1.4 | Github | . | PHP 7.4.3-4ubuntu2.24 | Генерация страницы: 0.01 | proxy | phpinfo | Настройка