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zte/Makefile 0000644 00000000214 14722071250 0007003 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-y := clk.o obj-$(CONFIG_SOC_ZX296702) += clk-zx296702.o obj-$(CONFIG_ARCH_ZX) += clk-zx296718.o sunxi-ng/Kconfig 0000644 00000004361 14722071250 0007623 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only config SUNXI_CCU bool "Clock support for Allwinner SoCs" depends on ARCH_SUNXI || COMPILE_TEST select RESET_CONTROLLER default ARCH_SUNXI if SUNXI_CCU config SUNIV_F1C100S_CCU bool "Support for the Allwinner newer F1C100s CCU" default MACH_SUNIV depends on MACH_SUNIV || COMPILE_TEST config SUN50I_A64_CCU bool "Support for the Allwinner A64 CCU" default ARM64 && ARCH_SUNXI depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST config SUN50I_H6_CCU bool "Support for the Allwinner H6 CCU" default ARM64 && ARCH_SUNXI depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST config SUN50I_H6_R_CCU bool "Support for the Allwinner H6 PRCM CCU" default ARM64 && ARCH_SUNXI depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST config SUN4I_A10_CCU bool "Support for the Allwinner A10/A20 CCU" default MACH_SUN4I default MACH_SUN7I depends on MACH_SUN4I || MACH_SUN7I || COMPILE_TEST config SUN5I_CCU bool "Support for the Allwinner sun5i family CCM" default MACH_SUN5I depends on MACH_SUN5I || COMPILE_TEST config SUN6I_A31_CCU bool "Support for the Allwinner A31/A31s CCU" default MACH_SUN6I depends on MACH_SUN6I || COMPILE_TEST config SUN8I_A23_CCU bool "Support for the Allwinner A23 CCU" default MACH_SUN8I depends on MACH_SUN8I || COMPILE_TEST config SUN8I_A33_CCU bool "Support for the Allwinner A33 CCU" default MACH_SUN8I depends on MACH_SUN8I || COMPILE_TEST config SUN8I_A83T_CCU bool "Support for the Allwinner A83T CCU" default MACH_SUN8I config SUN8I_H3_CCU bool "Support for the Allwinner H3 CCU" default MACH_SUN8I || (ARM64 && ARCH_SUNXI) depends on MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST config SUN8I_V3S_CCU bool "Support for the Allwinner V3s CCU" default MACH_SUN8I depends on MACH_SUN8I || COMPILE_TEST config SUN8I_DE2_CCU bool "Support for the Allwinner SoCs DE2 CCU" default MACH_SUN8I || (ARM64 && ARCH_SUNXI) config SUN8I_R40_CCU bool "Support for the Allwinner R40 CCU" default MACH_SUN8I depends on MACH_SUN8I || COMPILE_TEST config SUN9I_A80_CCU bool "Support for the Allwinner A80 CCU" default MACH_SUN9I depends on MACH_SUN9I || COMPILE_TEST config SUN8I_R_CCU bool "Support for Allwinner SoCs' PRCM CCUs" default MACH_SUN8I || (ARCH_SUNXI && ARM64) endif sunxi-ng/Makefile 0000644 00000002437 14722071250 0007762 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 # Common objects obj-y += ccu_common.o obj-y += ccu_mmc_timing.o obj-y += ccu_reset.o # Base clock types obj-y += ccu_div.o obj-y += ccu_frac.o obj-y += ccu_gate.o obj-y += ccu_mux.o obj-y += ccu_mult.o obj-y += ccu_phase.o obj-y += ccu_sdm.o # Multi-factor clocks obj-y += ccu_nk.o obj-y += ccu_nkm.o obj-y += ccu_nkmp.o obj-y += ccu_nm.o obj-y += ccu_mp.o # SoC support obj-$(CONFIG_SUNIV_F1C100S_CCU) += ccu-suniv-f1c100s.o obj-$(CONFIG_SUN50I_A64_CCU) += ccu-sun50i-a64.o obj-$(CONFIG_SUN50I_H6_CCU) += ccu-sun50i-h6.o obj-$(CONFIG_SUN50I_H6_R_CCU) += ccu-sun50i-h6-r.o obj-$(CONFIG_SUN4I_A10_CCU) += ccu-sun4i-a10.o obj-$(CONFIG_SUN5I_CCU) += ccu-sun5i.o obj-$(CONFIG_SUN6I_A31_CCU) += ccu-sun6i-a31.o obj-$(CONFIG_SUN8I_A23_CCU) += ccu-sun8i-a23.o obj-$(CONFIG_SUN8I_A33_CCU) += ccu-sun8i-a33.o obj-$(CONFIG_SUN8I_A83T_CCU) += ccu-sun8i-a83t.o obj-$(CONFIG_SUN8I_H3_CCU) += ccu-sun8i-h3.o obj-$(CONFIG_SUN8I_V3S_CCU) += ccu-sun8i-v3s.o obj-$(CONFIG_SUN8I_DE2_CCU) += ccu-sun8i-de2.o obj-$(CONFIG_SUN8I_R_CCU) += ccu-sun8i-r.o obj-$(CONFIG_SUN8I_R40_CCU) += ccu-sun8i-r40.o obj-$(CONFIG_SUN9I_A80_CCU) += ccu-sun9i-a80.o obj-$(CONFIG_SUN9I_A80_CCU) += ccu-sun9i-a80-de.o obj-$(CONFIG_SUN9I_A80_CCU) += ccu-sun9i-a80-usb.o sunxi/Kconfig 0000644 00000002270 14722071250 0007216 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only menuconfig CLK_SUNXI bool "Legacy clock support for Allwinner SoCs" depends on ARCH_SUNXI || COMPILE_TEST default y if CLK_SUNXI config CLK_SUNXI_CLOCKS bool "Legacy clock drivers" default y help Legacy clock drivers being used on older (A10, A13, A20, A23, A31, A80) SoCs. These drivers are kept around for Device Tree backward compatibility issues, in case one would still use a Device Tree with one clock provider by node. Newer Device Trees and newer SoCs use the drivers controlled by CONFIG_SUNXI_CCU. config CLK_SUNXI_PRCM_SUN6I bool "Legacy A31 PRCM driver" select MFD_SUN6I_PRCM default y help Legacy clock driver for the A31 PRCM clocks. Those are usually needed for the PMIC communication, mostly. config CLK_SUNXI_PRCM_SUN8I bool "Legacy sun8i PRCM driver" select MFD_SUN6I_PRCM default y help Legacy clock driver for the sun8i family PRCM clocks. Those are usually needed for the PMIC communication, mostly. config CLK_SUNXI_PRCM_SUN9I bool "Legacy A80 PRCM driver" default y help Legacy clock driver for the A80 PRCM clocks. Those are usually needed for the PMIC communication, mostly. endif sunxi/Makefile 0000644 00000002516 14722071250 0007356 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 # # Makefile for sunxi specific clk # obj-$(CONFIG_CLK_SUNXI) += clk-factors.o obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-sunxi.o obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-a10-codec.o obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-a10-hosc.o obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-a10-mod1.o obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-a10-pll2.o obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-a10-ve.o obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-a20-gmac.o obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-mod0.o obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-simple-gates.o obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-sun4i-display.o obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-sun4i-pll3.o obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-sun4i-tcon-ch1.o obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-sun8i-bus-gates.o obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-sun8i-mbus.o obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-sun9i-core.o obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-sun9i-mmc.o obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-usb.o obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-sun8i-apb0.o obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-sun9i-cpus.o obj-$(CONFIG_CLK_SUNXI_PRCM_SUN6I) += clk-sun6i-apb0.o obj-$(CONFIG_CLK_SUNXI_PRCM_SUN6I) += clk-sun6i-apb0-gates.o obj-$(CONFIG_CLK_SUNXI_PRCM_SUN6I) += clk-sun6i-ar100.o obj-$(CONFIG_CLK_SUNXI_PRCM_SUN8I) += clk-sun8i-apb0.o obj-$(CONFIG_CLK_SUNXI_PRCM_SUN8I) += clk-sun6i-apb0-gates.o ux500/Makefile 0000644 00000000354 14722071250 0007067 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 # # Makefile for ux500 clocks # # Clock types obj-y += clk-prcc.o obj-y += clk-prcmu.o obj-y += clk-sysctrl.o # Clock definitions obj-y += u8500_of_clk.o # ABX500 clock driver obj-y += abx500-clk.o berlin/Makefile 0000644 00000000326 14722071250 0007460 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-y += berlin2-avpll.o berlin2-pll.o berlin2-div.o obj-$(CONFIG_MACH_BERLIN_BG2) += bg2.o obj-$(CONFIG_MACH_BERLIN_BG2CD) += bg2.o obj-$(CONFIG_MACH_BERLIN_BG2Q) += bg2q.o nxp/Makefile 0000644 00000000345 14722071250 0007013 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_ARCH_LPC18XX) += clk-lpc18xx-cgu.o obj-$(CONFIG_ARCH_LPC18XX) += clk-lpc18xx-ccu.o obj-$(CONFIG_ARCH_LPC18XX) += clk-lpc18xx-creg.o obj-$(CONFIG_ARCH_LPC32XX) += clk-lpc32xx.o ingenic/Kconfig 0000644 00000002561 14722071250 0007467 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only menu "Ingenic SoCs drivers" depends on MIPS config INGENIC_CGU_COMMON bool config INGENIC_CGU_JZ4740 bool "Ingenic JZ4740 CGU driver" default MACH_JZ4740 select INGENIC_CGU_COMMON help Support the clocks provided by the CGU hardware on Ingenic JZ4740 and compatible SoCs. If building for a JZ4740 SoC, you want to say Y here. config INGENIC_CGU_JZ4725B bool "Ingenic JZ4725B CGU driver" default MACH_JZ4725B select INGENIC_CGU_COMMON help Support the clocks provided by the CGU hardware on Ingenic JZ4725B and compatible SoCs. If building for a JZ4725B SoC, you want to say Y here. config INGENIC_CGU_JZ4770 bool "Ingenic JZ4770 CGU driver" default MACH_JZ4770 select INGENIC_CGU_COMMON help Support the clocks provided by the CGU hardware on Ingenic JZ4770 and compatible SoCs. If building for a JZ4770 SoC, you want to say Y here. config INGENIC_CGU_JZ4780 bool "Ingenic JZ4780 CGU driver" default MACH_JZ4780 select INGENIC_CGU_COMMON help Support the clocks provided by the CGU hardware on Ingenic JZ4780 and compatible SoCs. If building for a JZ4780 SoC, you want to say Y here. config INGENIC_TCU_CLK bool "Ingenic JZ47xx TCU clocks driver" default MACH_INGENIC select MFD_SYSCON help Support the clocks of the Timer/Counter Unit (TCU) of the Ingenic JZ47xx SoCs. endmenu ingenic/Makefile 0000644 00000000505 14722071250 0007620 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_INGENIC_CGU_COMMON) += cgu.o pm.o obj-$(CONFIG_INGENIC_CGU_JZ4740) += jz4740-cgu.o obj-$(CONFIG_INGENIC_CGU_JZ4725B) += jz4725b-cgu.o obj-$(CONFIG_INGENIC_CGU_JZ4770) += jz4770-cgu.o obj-$(CONFIG_INGENIC_CGU_JZ4780) += jz4780-cgu.o obj-$(CONFIG_INGENIC_TCU_CLK) += tcu.o pxa/Makefile 0000644 00000000260 14722071250 0006772 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-y += clk-pxa.o obj-$(CONFIG_PXA25x) += clk-pxa25x.o obj-$(CONFIG_PXA27x) += clk-pxa27x.o obj-$(CONFIG_PXA3xx) += clk-pxa3xx.o mxs/Makefile 0000644 00000000336 14722071250 0007015 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only # # Makefile for mxs specific clk # obj-y += clk.o clk-pll.o clk-ref.o clk-div.o clk-frac.o clk-ssp.o obj-$(CONFIG_SOC_IMX23) += clk-imx23.o obj-$(CONFIG_SOC_IMX28) += clk-imx28.o Kconfig 0000644 00000023674 14722071250 0006063 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 config CLKDEV_LOOKUP bool select HAVE_CLK config HAVE_CLK_PREPARE bool config COMMON_CLK bool select HAVE_CLK_PREPARE select CLKDEV_LOOKUP select SRCU select RATIONAL ---help--- The common clock framework is a single definition of struct clk, useful across many platforms, as well as an implementation of the clock API in include/linux/clk.h. Architectures utilizing the common struct clk should select this option. menu "Common Clock Framework" depends on COMMON_CLK config COMMON_CLK_WM831X tristate "Clock driver for WM831x/2x PMICs" depends on MFD_WM831X ---help--- Supports the clocking subsystem of the WM831x/2x series of PMICs from Wolfson Microelectronics. source "drivers/clk/versatile/Kconfig" config CLK_HSDK bool "PLL Driver for HSDK platform" depends on OF || COMPILE_TEST ---help--- This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs control. config COMMON_CLK_MAX77686 tristate "Clock driver for Maxim 77620/77686/77802 MFD" depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST ---help--- This driver supports Maxim 77620/77686/77802 crystal oscillator clock. config COMMON_CLK_MAX9485 tristate "Maxim 9485 Programmable Clock Generator" depends on I2C help This driver supports Maxim 9485 Programmable Audio Clock Generator config COMMON_CLK_RK808 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818" depends on MFD_RK808 ---help--- This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock. These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each. Clkout1 is always on, Clkout2 can off by control register. config COMMON_CLK_HI655X tristate "Clock driver for Hi655x" if EXPERT depends on (MFD_HI655X_PMIC || COMPILE_TEST) select REGMAP default MFD_HI655X_PMIC ---help--- This driver supports the hi655x PMIC clock. This multi-function device has one fixed-rate oscillator, clocked at 32KHz. config COMMON_CLK_SCMI tristate "Clock driver controlled via SCMI interface" depends on ARM_SCMI_PROTOCOL || COMPILE_TEST ---help--- This driver provides support for clocks that are controlled by firmware that implements the SCMI interface. This driver uses SCMI Message Protocol to interact with the firmware providing all the clock controls. config COMMON_CLK_SCPI tristate "Clock driver controlled via SCPI interface" depends on ARM_SCPI_PROTOCOL || COMPILE_TEST ---help--- This driver provides support for clocks that are controlled by firmware that implements the SCPI interface. This driver uses SCPI Message Protocol to interact with the firmware providing all the clock controls. config COMMON_CLK_SI5341 tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices" depends on I2C select REGMAP_I2C help This driver supports Silicon Labs Si5341 and Si5340 programmable clock generators. Not all features of these chips are currently supported by the driver, in particular it only supports XTAL input. The chip can be pre-programmed to support other configurations and features not yet implemented in the driver. config COMMON_CLK_SI5351 tristate "Clock driver for SiLabs 5351A/B/C" depends on I2C select REGMAP_I2C select RATIONAL ---help--- This driver supports Silicon Labs 5351A/B/C programmable clock generators. config COMMON_CLK_SI514 tristate "Clock driver for SiLabs 514 devices" depends on I2C depends on OF select REGMAP_I2C help This driver supports the Silicon Labs 514 programmable clock generator. config COMMON_CLK_SI544 tristate "Clock driver for SiLabs 544 devices" depends on I2C select REGMAP_I2C help This driver supports the Silicon Labs 544 programmable clock generator. config COMMON_CLK_SI570 tristate "Clock driver for SiLabs 570 and compatible devices" depends on I2C depends on OF select REGMAP_I2C help This driver supports Silicon Labs 570/571/598/599 programmable clock generators. config COMMON_CLK_CDCE706 tristate "Clock driver for TI CDCE706 clock synthesizer" depends on I2C select REGMAP_I2C select RATIONAL ---help--- This driver supports TI CDCE706 programmable 3-PLL clock synthesizer. config COMMON_CLK_CDCE925 tristate "Clock driver for TI CDCE913/925/937/949 devices" depends on I2C depends on OF select REGMAP_I2C help This driver supports the TI CDCE913/925/937/949 programmable clock synthesizer. Each chip has different number of PLLs and outputs. For example, the CDCE925 contains two PLLs with spread-spectrum clocking support and five output dividers. The driver only supports the following setup, and uses a fixed setting for the output muxes. Y1 is derived from the input clock Y2 and Y3 derive from PLL1 Y4 and Y5 derive from PLL2 Given a target output frequency, the driver will set the PLL and divider to best approximate the desired output. config COMMON_CLK_CS2000_CP tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier" depends on I2C help If you say yes here you get support for the CS2000 clock multiplier. config COMMON_CLK_GEMINI bool "Clock driver for Cortina Systems Gemini SoC" depends on ARCH_GEMINI || COMPILE_TEST select MFD_SYSCON select RESET_CONTROLLER ---help--- This driver supports the SoC clocks on the Cortina Systems Gemini platform, also known as SL3516 or CS3516. config COMMON_CLK_ASPEED bool "Clock driver for Aspeed BMC SoCs" depends on ARCH_ASPEED || COMPILE_TEST default ARCH_ASPEED select MFD_SYSCON select RESET_CONTROLLER ---help--- This driver supports the SoC clocks on the Aspeed BMC platforms. The G4 and G5 series, including the ast2400 and ast2500, are supported by this driver. config COMMON_CLK_S2MPS11 tristate "Clock driver for S2MPS1X/S5M8767 MFD" depends on MFD_SEC_CORE || COMPILE_TEST ---help--- This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator clock. These multi-function devices have two (S2MPS14) or three (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each. config CLK_TWL6040 tristate "External McPDM functional clock from twl6040" depends on TWL6040_CORE ---help--- Enable the external functional clock support on OMAP4+ platforms for McPDM. McPDM module is using the external bit clock on the McPDM bus as functional clock. config COMMON_CLK_AXI_CLKGEN tristate "AXI clkgen driver" depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST help Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx FPGAs. It is commonly used in Analog Devices' reference designs. config CLK_QORIQ bool "Clock driver for Freescale QorIQ platforms" depends on (PPC_E500MC || ARM || ARM64 || COMPILE_TEST) && OF ---help--- This adds the clock driver support for Freescale QorIQ platforms using common clock framework. config COMMON_CLK_XGENE bool "Clock driver for APM XGene SoC" default ARCH_XGENE depends on ARM64 || COMPILE_TEST ---help--- Sypport for the APM X-Gene SoC reference, PLL, and device clocks. config COMMON_CLK_LOCHNAGAR tristate "Cirrus Logic Lochnagar clock driver" depends on MFD_LOCHNAGAR help This driver supports the clocking features of the Cirrus Logic Lochnagar audio development board. config COMMON_CLK_NXP def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX) select REGMAP_MMIO if ARCH_LPC32XX select MFD_SYSCON if ARCH_LPC18XX ---help--- Support for clock providers on NXP platforms. config COMMON_CLK_PALMAS tristate "Clock driver for TI Palmas devices" depends on MFD_PALMAS ---help--- This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO using common clock framework. config COMMON_CLK_PWM tristate "Clock driver for PWMs used as clock outputs" depends on PWM ---help--- Adapter driver so that any PWM output can be (mis)used as clock signal at 50% duty cycle. config COMMON_CLK_PXA def_bool COMMON_CLK && ARCH_PXA ---help--- Support for the Marvell PXA SoC. config COMMON_CLK_PIC32 def_bool COMMON_CLK && MACH_PIC32 config COMMON_CLK_OXNAS bool "Clock driver for the OXNAS SoC Family" depends on ARCH_OXNAS || COMPILE_TEST select MFD_SYSCON ---help--- Support for the OXNAS SoC Family clocks. config COMMON_CLK_VC5 tristate "Clock driver for IDT VersaClock 5,6 devices" depends on I2C depends on OF select REGMAP_I2C help This driver supports the IDT VersaClock 5 and VersaClock 6 programmable clock generators. config COMMON_CLK_STM32MP157 def_bool COMMON_CLK && MACH_STM32MP157 help Support for stm32mp157 SoC family clocks config COMMON_CLK_STM32F def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746) help Support for stm32f4 and stm32f7 SoC families clocks config COMMON_CLK_STM32H7 def_bool COMMON_CLK && MACH_STM32H743 help Support for stm32h7 SoC family clocks config COMMON_CLK_BD718XX tristate "Clock driver for ROHM BD718x7 PMIC" depends on MFD_ROHM_BD718XX || MFD_ROHM_BD70528 help This driver supports ROHM BD71837, ROHM BD71847 and ROHM BD70528 PMICs clock gates. config COMMON_CLK_FIXED_MMIO bool "Clock driver for Memory Mapped Fixed values" depends on COMMON_CLK && OF depends on HAS_IOMEM help Support for Memory Mapped IO Fixed clocks source "drivers/clk/actions/Kconfig" source "drivers/clk/analogbits/Kconfig" source "drivers/clk/bcm/Kconfig" source "drivers/clk/hisilicon/Kconfig" source "drivers/clk/imgtec/Kconfig" source "drivers/clk/imx/Kconfig" source "drivers/clk/ingenic/Kconfig" source "drivers/clk/keystone/Kconfig" source "drivers/clk/mediatek/Kconfig" source "drivers/clk/meson/Kconfig" source "drivers/clk/mvebu/Kconfig" source "drivers/clk/qcom/Kconfig" source "drivers/clk/renesas/Kconfig" source "drivers/clk/samsung/Kconfig" source "drivers/clk/sifive/Kconfig" source "drivers/clk/sprd/Kconfig" source "drivers/clk/sunxi/Kconfig" source "drivers/clk/sunxi-ng/Kconfig" source "drivers/clk/tegra/Kconfig" source "drivers/clk/ti/Kconfig" source "drivers/clk/uniphier/Kconfig" source "drivers/clk/zynqmp/Kconfig" endmenu davinci/Makefile 0000644 00000001345 14722071250 0007624 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 ifeq ($(CONFIG_COMMON_CLK), y) obj-$(CONFIG_ARCH_DAVINCI_DA8XX) += da8xx-cfgchip.o obj-y += pll.o obj-$(CONFIG_ARCH_DAVINCI_DA830) += pll-da830.o obj-$(CONFIG_ARCH_DAVINCI_DA850) += pll-da850.o obj-$(CONFIG_ARCH_DAVINCI_DM355) += pll-dm355.o obj-$(CONFIG_ARCH_DAVINCI_DM365) += pll-dm365.o obj-$(CONFIG_ARCH_DAVINCI_DM644x) += pll-dm644x.o obj-$(CONFIG_ARCH_DAVINCI_DM646x) += pll-dm646x.o obj-y += psc.o obj-$(CONFIG_ARCH_DAVINCI_DA830) += psc-da830.o obj-$(CONFIG_ARCH_DAVINCI_DA850) += psc-da850.o obj-$(CONFIG_ARCH_DAVINCI_DM355) += psc-dm355.o obj-$(CONFIG_ARCH_DAVINCI_DM365) += psc-dm365.o obj-$(CONFIG_ARCH_DAVINCI_DM644x) += psc-dm644x.o obj-$(CONFIG_ARCH_DAVINCI_DM646x) += psc-dm646x.o endif st/Makefile 0000644 00000000147 14722071250 0006634 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-y += clkgen-mux.o clkgen-pll.o clkgen-fsyn.o clk-flexgen.o spear/Makefile 0000644 00000000533 14722071250 0007317 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 # # SPEAr Clock specific Makefile # obj-y += clk.o clk-aux-synth.o clk-frac-synth.o clk-gpt-synth.o clk-vco-pll.o obj-$(CONFIG_ARCH_SPEAR3XX) += spear3xx_clock.o obj-$(CONFIG_ARCH_SPEAR6XX) += spear6xx_clock.o obj-$(CONFIG_MACH_SPEAR1310) += spear1310_clock.o obj-$(CONFIG_MACH_SPEAR1340) += spear1340_clock.o pistachio/Makefile 0000644 00000000143 14722071250 0010165 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-y += clk.o obj-y += clk-pll.o obj-y += clk-pistachio.o axs10x/Makefile 0000644 00000000126 14722071250 0007327 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-y += i2s_pll_clock.o obj-y += pll_clock.o qcom/Kconfig 0000644 00000024734 14722071250 0007020 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only config KRAIT_CLOCKS bool select KRAIT_L2_ACCESSORS config QCOM_GDSC bool select PM_GENERIC_DOMAINS if PM config QCOM_RPMCC bool menuconfig COMMON_CLK_QCOM tristate "Support for Qualcomm's clock controllers" depends on OF depends on ARCH_QCOM || COMPILE_TEST select REGMAP_MMIO select RESET_CONTROLLER if COMMON_CLK_QCOM config QCOM_A53PLL tristate "MSM8916 A53 PLL" help Support for the A53 PLL on MSM8916 devices. It provides the CPU with frequencies above 1GHz. Say Y if you want to support higher CPU frequencies on MSM8916 devices. config QCOM_CLK_APCS_MSM8916 tristate "MSM8916 APCS Clock Controller" depends on QCOM_APCS_IPC || COMPILE_TEST help Support for the APCS Clock Controller on msm8916 devices. The APCS is managing the mux and divider which feeds the CPUs. Say Y if you want to support CPU frequency scaling on devices such as msm8916. config QCOM_CLK_RPM tristate "RPM based Clock Controller" depends on MFD_QCOM_RPM select QCOM_RPMCC help The RPM (Resource Power Manager) is a dedicated hardware engine for managing the shared SoC resources in order to keep the lowest power profile. It communicates with other hardware subsystems via shared memory and accepts clock requests, aggregates the requests and turns the clocks on/off or scales them on demand. Say Y if you want to support the clocks exposed by the RPM on platforms such as apq8064, msm8660, msm8960 etc. config QCOM_CLK_SMD_RPM tristate "RPM over SMD based Clock Controller" depends on QCOM_SMD_RPM select QCOM_RPMCC help The RPM (Resource Power Manager) is a dedicated hardware engine for managing the shared SoC resources in order to keep the lowest power profile. It communicates with other hardware subsystems via shared memory and accepts clock requests, aggregates the requests and turns the clocks on/off or scales them on demand. Say Y if you want to support the clocks exposed by the RPM on platforms such as apq8016, apq8084, msm8974 etc. config QCOM_CLK_RPMH tristate "RPMh Clock Driver" depends on QCOM_RPMH help RPMh manages shared resources on some Qualcomm Technologies, Inc. SoCs. It accepts requests from other hardware subsystems via RSC. Say Y if you want to support the clocks exposed by RPMh on platforms such as SDM845. config APQ_GCC_8084 tristate "APQ8084 Global Clock Controller" select QCOM_GDSC help Support for the global clock controller on apq8084 devices. Say Y if you want to use peripheral devices such as UART, SPI, i2c, USB, SD/eMMC, SATA, PCIe, etc. config APQ_MMCC_8084 tristate "APQ8084 Multimedia Clock Controller" select APQ_GCC_8084 select QCOM_GDSC help Support for the multimedia clock controller on apq8084 devices. Say Y if you want to support multimedia devices such as display, graphics, video encode/decode, camera, etc. config IPQ_GCC_4019 tristate "IPQ4019 Global Clock Controller" help Support for the global clock controller on ipq4019 devices. Say Y if you want to use peripheral devices such as UART, SPI, i2c, USB, SD/eMMC, etc. config IPQ_GCC_806X tristate "IPQ806x Global Clock Controller" help Support for the global clock controller on ipq806x devices. Say Y if you want to use peripheral devices such as UART, SPI, i2c, USB, SD/eMMC, etc. config IPQ_LCC_806X tristate "IPQ806x LPASS Clock Controller" select IPQ_GCC_806X help Support for the LPASS clock controller on ipq806x devices. Say Y if you want to use audio devices such as i2s, pcm, S/PDIF, etc. config IPQ_GCC_8074 tristate "IPQ8074 Global Clock Controller" help Support for global clock controller on ipq8074 devices. Say Y if you want to use peripheral devices such as UART, SPI, i2c, USB, SD/eMMC, etc. Select this for the root clock of ipq8074. config MSM_GCC_8660 tristate "MSM8660 Global Clock Controller" help Support for the global clock controller on msm8660 devices. Say Y if you want to use peripheral devices such as UART, SPI, i2c, USB, SD/eMMC, etc. config MSM_GCC_8916 tristate "MSM8916 Global Clock Controller" select QCOM_GDSC help Support for the global clock controller on msm8916 devices. Say Y if you want to use devices such as UART, SPI i2c, USB, SD/eMMC, display, graphics, camera etc. config MSM_GCC_8960 tristate "APQ8064/MSM8960 Global Clock Controller" help Support for the global clock controller on apq8064/msm8960 devices. Say Y if you want to use peripheral devices such as UART, SPI, i2c, USB, SD/eMMC, SATA, PCIe, etc. config MSM_LCC_8960 tristate "APQ8064/MSM8960 LPASS Clock Controller" select MSM_GCC_8960 help Support for the LPASS clock controller on apq8064/msm8960 devices. Say Y if you want to use audio devices such as i2s, pcm, SLIMBus, etc. config MDM_GCC_9615 tristate "MDM9615 Global Clock Controller" help Support for the global clock controller on mdm9615 devices. Say Y if you want to use peripheral devices such as UART, SPI, i2c, USB, SD/eMMC, etc. config MDM_LCC_9615 tristate "MDM9615 LPASS Clock Controller" select MDM_GCC_9615 help Support for the LPASS clock controller on mdm9615 devices. Say Y if you want to use audio devices such as i2s, pcm, SLIMBus, etc. config MSM_MMCC_8960 tristate "MSM8960 Multimedia Clock Controller" select MSM_GCC_8960 help Support for the multimedia clock controller on msm8960 devices. Say Y if you want to support multimedia devices such as display, graphics, video encode/decode, camera, etc. config MSM_GCC_8974 tristate "MSM8974 Global Clock Controller" select QCOM_GDSC help Support for the global clock controller on msm8974 devices. Say Y if you want to use peripheral devices such as UART, SPI, i2c, USB, SD/eMMC, SATA, PCIe, etc. config MSM_MMCC_8974 tristate "MSM8974 Multimedia Clock Controller" select MSM_GCC_8974 select QCOM_GDSC help Support for the multimedia clock controller on msm8974 devices. Say Y if you want to support multimedia devices such as display, graphics, video encode/decode, camera, etc. config MSM_GCC_8994 tristate "MSM8994 Global Clock Controller" help Support for the global clock controller on msm8994 devices. Say Y if you want to use peripheral devices such as UART, SPI, i2c, USB, UFS, SD/eMMC, PCIe, etc. config MSM_GCC_8996 tristate "MSM8996 Global Clock Controller" select QCOM_GDSC help Support for the global clock controller on msm8996 devices. Say Y if you want to use peripheral devices such as UART, SPI, i2c, USB, UFS, SD/eMMC, PCIe, etc. config MSM_MMCC_8996 tristate "MSM8996 Multimedia Clock Controller" select MSM_GCC_8996 select QCOM_GDSC help Support for the multimedia clock controller on msm8996 devices. Say Y if you want to support multimedia devices such as display, graphics, video encode/decode, camera, etc. config MSM_GCC_8998 tristate "MSM8998 Global Clock Controller" select QCOM_GDSC help Support for the global clock controller on msm8998 devices. Say Y if you want to use peripheral devices such as UART, SPI, i2c, USB, UFS, SD/eMMC, PCIe, etc. config QCS_GCC_404 tristate "QCS404 Global Clock Controller" help Support for the global clock controller on QCS404 devices. Say Y if you want to use multimedia devices or peripheral devices such as UART, SPI, I2C, USB, SD/eMMC, PCIe etc. config SDM_CAMCC_845 tristate "SDM845 Camera Clock Controller" select SDM_GCC_845 help Support for the camera clock controller on SDM845 devices. Say Y if you want to support camera devices and camera functionality. config SDM_GCC_660 tristate "SDM660 Global Clock Controller" select QCOM_GDSC help Support for the global clock controller on SDM660 devices. Say Y if you want to use peripheral devices such as UART, SPI, i2C, USB, UFS, SDDC, PCIe, etc. config QCS_TURING_404 tristate "QCS404 Turing Clock Controller" help Support for the Turing Clock Controller on QCS404, provides clocks and resets for the Turing subsystem. config SDM_GCC_845 tristate "SDM845 Global Clock Controller" select QCOM_GDSC help Support for the global clock controller on SDM845 devices. Say Y if you want to use peripheral devices such as UART, SPI, i2C, USB, UFS, SDDC, PCIe, etc. config SDM_GPUCC_845 tristate "SDM845 Graphics Clock Controller" select SDM_GCC_845 help Support for the graphics clock controller on SDM845 devices. Say Y if you want to support graphics controller devices and functionality such as 3D graphics. config SDM_VIDEOCC_845 tristate "SDM845 Video Clock Controller" select SDM_GCC_845 select QCOM_GDSC help Support for the video clock controller on SDM845 devices. Say Y if you want to support video devices and functionality such as video encode and decode. config SDM_DISPCC_845 tristate "SDM845 Display Clock Controller" select SDM_GCC_845 help Support for the display clock controller on Qualcomm Technologies, Inc SDM845 devices. Say Y if you want to support display devices and functionality such as splash screen. config SDM_LPASSCC_845 tristate "SDM845 Low Power Audio Subsystem (LPAAS) Clock Controller" select SDM_GCC_845 help Support for the LPASS clock controller on SDM845 devices. Say Y if you want to use the LPASS branch clocks of the LPASS clock controller to reset the LPASS subsystem. config SM_GCC_8150 tristate "SM8150 Global Clock Controller" help Support for the global clock controller on SM8150 devices. Say Y if you want to use peripheral devices such as UART, SPI, I2C, USB, SD/UFS, PCIe etc. config SPMI_PMIC_CLKDIV tristate "SPMI PMIC clkdiv Support" depends on SPMI || COMPILE_TEST help This driver supports the clkdiv functionality on the Qualcomm Technologies, Inc. SPMI PMIC. It configures the frequency of clkdiv outputs of the PMIC. These clocks are typically wired through alternate functions on GPIO pins. config QCOM_HFPLL tristate "High-Frequency PLL (HFPLL) Clock Controller" help Support for the high-frequency PLLs present on Qualcomm devices. Say Y if you want to support CPU frequency scaling on devices such as MSM8974, APQ8084, etc. config KPSS_XCC tristate "KPSS Clock Controller" help Support for the Krait ACC and GCC clock controllers. Say Y if you want to support CPU frequency scaling on devices such as MSM8960, APQ8064, etc. config KRAITCC tristate "Krait Clock Controller" depends on ARM select KRAIT_CLOCKS help Support for the Krait CPU clocks on Qualcomm devices. Say Y if you want to support CPU frequency scaling. endif qcom/Makefile 0000644 00000004257 14722071250 0007153 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o clk-qcom-y += common.o clk-qcom-y += clk-regmap.o clk-qcom-y += clk-alpha-pll.o clk-qcom-y += clk-pll.o clk-qcom-y += clk-rcg.o clk-qcom-y += clk-rcg2.o clk-qcom-y += clk-branch.o clk-qcom-y += clk-regmap-divider.o clk-qcom-y += clk-regmap-mux.o clk-qcom-y += clk-regmap-mux-div.o clk-qcom-$(CONFIG_KRAIT_CLOCKS) += clk-krait.o clk-qcom-y += clk-hfpll.o clk-qcom-y += reset.o clk-qcom-$(CONFIG_QCOM_GDSC) += gdsc.o # Keep alphabetically sorted by config obj-$(CONFIG_APQ_GCC_8084) += gcc-apq8084.o obj-$(CONFIG_APQ_MMCC_8084) += mmcc-apq8084.o obj-$(CONFIG_IPQ_GCC_4019) += gcc-ipq4019.o obj-$(CONFIG_IPQ_GCC_806X) += gcc-ipq806x.o obj-$(CONFIG_IPQ_GCC_8074) += gcc-ipq8074.o obj-$(CONFIG_IPQ_LCC_806X) += lcc-ipq806x.o obj-$(CONFIG_MDM_GCC_9615) += gcc-mdm9615.o obj-$(CONFIG_MDM_LCC_9615) += lcc-mdm9615.o obj-$(CONFIG_MSM_GCC_8660) += gcc-msm8660.o obj-$(CONFIG_MSM_GCC_8916) += gcc-msm8916.o obj-$(CONFIG_MSM_GCC_8960) += gcc-msm8960.o obj-$(CONFIG_MSM_GCC_8974) += gcc-msm8974.o obj-$(CONFIG_MSM_GCC_8994) += gcc-msm8994.o obj-$(CONFIG_MSM_GCC_8996) += gcc-msm8996.o obj-$(CONFIG_MSM_LCC_8960) += lcc-msm8960.o obj-$(CONFIG_MSM_GCC_8998) += gcc-msm8998.o obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o obj-$(CONFIG_QCOM_A53PLL) += a53-pll.o obj-$(CONFIG_QCOM_CLK_APCS_MSM8916) += apcs-msm8916.o obj-$(CONFIG_QCOM_CLK_RPM) += clk-rpm.o obj-$(CONFIG_QCOM_CLK_RPMH) += clk-rpmh.o obj-$(CONFIG_QCOM_CLK_SMD_RPM) += clk-smd-rpm.o obj-$(CONFIG_QCS_GCC_404) += gcc-qcs404.o obj-$(CONFIG_QCS_TURING_404) += turingcc-qcs404.o obj-$(CONFIG_SDM_CAMCC_845) += camcc-sdm845.o obj-$(CONFIG_SDM_DISPCC_845) += dispcc-sdm845.o obj-$(CONFIG_SDM_GCC_660) += gcc-sdm660.o obj-$(CONFIG_SDM_GCC_845) += gcc-sdm845.o obj-$(CONFIG_SDM_GPUCC_845) += gpucc-sdm845.o obj-$(CONFIG_SDM_LPASSCC_845) += lpasscc-sdm845.o obj-$(CONFIG_SDM_VIDEOCC_845) += videocc-sdm845.o obj-$(CONFIG_SM_GCC_8150) += gcc-sm8150.o obj-$(CONFIG_SPMI_PMIC_CLKDIV) += clk-spmi-pmic-div.o obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o obj-$(CONFIG_QCOM_HFPLL) += hfpll.o obj-$(CONFIG_KRAITCC) += krait-cc.o keystone/Kconfig 0000644 00000002132 14722071250 0007706 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only config COMMON_CLK_KEYSTONE tristate "Clock drivers for Keystone based SOCs" depends on (ARCH_KEYSTONE || COMPILE_TEST) && OF ---help--- Supports clock drivers for Keystone based SOCs. These SOCs have local a power sleep control module that gate the clock to the IPs and PLLs. config TI_SCI_CLK tristate "TI System Control Interface clock drivers" depends on (ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST) && OF depends on TI_SCI_PROTOCOL default ARCH_KEYSTONE ---help--- This adds the clock driver support over TI System Control Interface. If you wish to use clock resources from the PMMC firmware, say Y. Otherwise, say N. config TI_SCI_CLK_PROBE_FROM_FW bool "Probe available clocks from firmware" depends on TI_SCI_CLK default n help Forces the TI SCI clock driver to probe available clocks from the firmware. By default, only the used clocks are probed from DT. This is mostly only useful for debugging purposes, and will increase the boot time of the device. If you want the clocks probed from firmware, say Y. Otherwise, say N. keystone/Makefile 0000644 00000000201 14722071250 0010036 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_COMMON_CLK_KEYSTONE) += pll.o gate.o obj-$(CONFIG_TI_SCI_CLK) += sci-clk.o sifive/Kconfig 0000644 00000000736 14722071250 0007342 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 menuconfig CLK_SIFIVE bool "SiFive SoC driver support" depends on RISCV || COMPILE_TEST help SoC drivers for SiFive Linux-capable SoCs. if CLK_SIFIVE config CLK_SIFIVE_FU540_PRCI bool "PRCI driver for SiFive FU540 SoCs" select CLK_ANALOGBITS_WRPLL_CLN28HPC help Supports the Power Reset Clock interface (PRCI) IP block found in FU540 SoCs. If this kernel is meant to run on a SiFive FU540 SoC, enable this driver. endif sifive/Makefile 0000644 00000000134 14722071250 0007467 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_CLK_SIFIVE_FU540_PRCI) += fu540-prci.o axis/Makefile 0000644 00000000124 14722071250 0007145 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_MACH_ARTPEC6) += clk-artpec6.o microchip/Makefile 0000644 00000000200 14722071250 0010151 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_COMMON_CLK_PIC32) += clk-core.o obj-$(CONFIG_PIC32MZDA) += clk-pic32mzda.o x86/Makefile 0000644 00000000323 14722071250 0006627 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_PMC_ATOM) += clk-pmc-atom.o obj-$(CONFIG_X86_AMD_PLATFORM_DEVICE) += clk-st.o clk-x86-lpss-objs := clk-lpt.o obj-$(CONFIG_X86_INTEL_LPSS) += clk-x86-lpss.o zynq/Makefile 0000644 00000000136 14722071250 0007205 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only # Zynq clock specific Makefile obj-y += clkc.o pll.o uniphier/Kconfig 0000644 00000000551 14722071250 0007673 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only config CLK_UNIPHIER bool "Clock driver for UniPhier SoCs" depends on ARCH_UNIPHIER || COMPILE_TEST depends on OF && MFD_SYSCON default ARCH_UNIPHIER help Support for clock controllers on UniPhier SoCs. Say Y if you want to control clocks provided by System Control block, Media I/O block, Peripheral Block. uniphier/Makefile 0000644 00000000470 14722071250 0010030 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 obj-y += clk-uniphier-core.o obj-y += clk-uniphier-cpugear.o obj-y += clk-uniphier-fixed-factor.o obj-y += clk-uniphier-fixed-rate.o obj-y += clk-uniphier-gate.o obj-y += clk-uniphier-mux.o obj-y += clk-uniphier-sys.o obj-y += clk-uniphier-mio.o obj-y += clk-uniphier-peri.o sirf/Makefile 0000644 00000000220 14722071250 0007141 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only # # Makefile for sirf specific clk # obj-$(CONFIG_ARCH_SIRF) += clk-prima2.o clk-atlas6.o clk-atlas7.o tegra/Kconfig 0000644 00000000403 14722071250 0007146 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only config TEGRA_CLK_EMC def_bool y depends on TEGRA124_EMC config CLK_TEGRA_BPMP def_bool y depends on TEGRA_BPMP config TEGRA_CLK_DFLL depends on ARCH_TEGRA_124_SOC || ARCH_TEGRA_210_SOC select PM_OPP def_bool y tegra/Makefile 0000644 00000001741 14722071250 0007311 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 obj-y += clk.o obj-y += clk-audio-sync.o obj-y += clk-dfll.o obj-y += clk-divider.o obj-y += clk-periph.o obj-y += clk-periph-fixed.o obj-y += clk-periph-gate.o obj-y += clk-pll.o obj-y += clk-pll-out.o obj-y += clk-sdmmc-mux.o obj-y += clk-super.o obj-y += clk-tegra-audio.o obj-y += clk-tegra-periph.o obj-y += clk-tegra-pmc.o obj-y += clk-tegra-fixed.o obj-y += clk-tegra-super-gen4.o obj-$(CONFIG_TEGRA_CLK_EMC) += clk-emc.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += clk-tegra20.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += clk-tegra30.o obj-$(CONFIG_ARCH_TEGRA_114_SOC) += clk-tegra114.o obj-$(CONFIG_ARCH_TEGRA_124_SOC) += clk-tegra124.o obj-$(CONFIG_TEGRA_CLK_DFLL) += clk-tegra124-dfll-fcpu.o obj-$(CONFIG_ARCH_TEGRA_132_SOC) += clk-tegra124.o obj-y += cvb.o obj-$(CONFIG_ARCH_TEGRA_210_SOC) += clk-tegra210.o obj-$(CONFIG_CLK_TEGRA_BPMP) += clk-bpmp.o obj-y += clk-utils.o mmp/Makefile 0000644 00000000665 14722071250 0007004 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 # # Makefile for mmp specific clk # obj-y += clk-apbc.o clk-apmu.o clk-frac.o clk-mix.o clk-gate.o clk.o obj-$(CONFIG_RESET_CONTROLLER) += reset.o obj-$(CONFIG_MACH_MMP_DT) += clk-of-pxa168.o clk-of-pxa910.o obj-$(CONFIG_MACH_MMP2_DT) += clk-of-mmp2.o obj-$(CONFIG_CPU_PXA168) += clk-pxa168.o obj-$(CONFIG_CPU_PXA910) += clk-pxa910.o obj-$(CONFIG_CPU_MMP2) += clk-mmp2.o obj-y += clk-of-pxa1928.o zynqmp/Kconfig 0000644 00000000531 14722071250 0007404 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 config COMMON_CLK_ZYNQMP bool "Support for Xilinx ZynqMP Ultrascale+ clock controllers" depends on ARCH_ZYNQMP || COMPILE_TEST depends on ZYNQMP_FIRMWARE help Support for the Zynqmp Ultrascale clock controller. It has a dependency on the PMU firmware. Say Y if you want to include clock support. zynqmp/Makefile 0000644 00000000254 14722071250 0007543 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 # Zynq Ultrascale+ MPSoC clock specific Makefile obj-$(CONFIG_ARCH_ZYNQMP) += pll.o clk-gate-zynqmp.o divider.o clk-mux-zynqmp.o clkc.o loongson1/Makefile 0000644 00000000234 14722071250 0010122 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-y += clk.o obj-$(CONFIG_LOONGSON1_LS1B) += clk-loongson1b.o obj-$(CONFIG_LOONGSON1_LS1C) += clk-loongson1c.o meson/Kconfig 0000644 00000005434 14722071250 0007176 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only config COMMON_CLK_MESON_REGMAP tristate select REGMAP config COMMON_CLK_MESON_DUALDIV tristate select COMMON_CLK_MESON_REGMAP config COMMON_CLK_MESON_MPLL tristate select COMMON_CLK_MESON_REGMAP config COMMON_CLK_MESON_PHASE tristate select COMMON_CLK_MESON_REGMAP config COMMON_CLK_MESON_PLL tristate select COMMON_CLK_MESON_REGMAP config COMMON_CLK_MESON_SCLK_DIV tristate select COMMON_CLK_MESON_REGMAP config COMMON_CLK_MESON_VID_PLL_DIV tristate select COMMON_CLK_MESON_REGMAP config COMMON_CLK_MESON_AO_CLKC tristate select COMMON_CLK_MESON_REGMAP select RESET_CONTROLLER config COMMON_CLK_MESON_EE_CLKC tristate select COMMON_CLK_MESON_REGMAP config COMMON_CLK_MESON_CPU_DYNDIV tristate select COMMON_CLK_MESON_REGMAP config COMMON_CLK_MESON8B bool depends on ARCH_MESON select COMMON_CLK_MESON_REGMAP select COMMON_CLK_MESON_MPLL select COMMON_CLK_MESON_PLL select MFD_SYSCON select RESET_CONTROLLER help Support for the clock controller on AmLogic S802 (Meson8), S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you want peripherals and CPU frequency scaling to work. config COMMON_CLK_GXBB bool depends on ARCH_MESON select COMMON_CLK_MESON_REGMAP select COMMON_CLK_MESON_DUALDIV select COMMON_CLK_MESON_VID_PLL_DIV select COMMON_CLK_MESON_MPLL select COMMON_CLK_MESON_PLL select COMMON_CLK_MESON_AO_CLKC select COMMON_CLK_MESON_EE_CLKC select MFD_SYSCON help Support for the clock controller on AmLogic S905 devices, aka gxbb. Say Y if you want peripherals and CPU frequency scaling to work. config COMMON_CLK_AXG bool depends on ARCH_MESON select COMMON_CLK_MESON_REGMAP select COMMON_CLK_MESON_DUALDIV select COMMON_CLK_MESON_MPLL select COMMON_CLK_MESON_PLL select COMMON_CLK_MESON_AO_CLKC select COMMON_CLK_MESON_EE_CLKC select MFD_SYSCON help Support for the clock controller on AmLogic A113D devices, aka axg. Say Y if you want peripherals and CPU frequency scaling to work. config COMMON_CLK_AXG_AUDIO tristate "Meson AXG Audio Clock Controller Driver" depends on ARCH_MESON select COMMON_CLK_MESON_REGMAP select COMMON_CLK_MESON_PHASE select COMMON_CLK_MESON_SCLK_DIV select REGMAP_MMIO help Support for the audio clock controller on AmLogic A113D devices, aka axg, Say Y if you want audio subsystem to work. config COMMON_CLK_G12A bool depends on ARCH_MESON select COMMON_CLK_MESON_REGMAP select COMMON_CLK_MESON_DUALDIV select COMMON_CLK_MESON_MPLL select COMMON_CLK_MESON_PLL select COMMON_CLK_MESON_AO_CLKC select COMMON_CLK_MESON_EE_CLKC select COMMON_CLK_MESON_CPU_DYNDIV select COMMON_CLK_MESON_VID_PLL_DIV select MFD_SYSCON help Support for the clock controller on Amlogic S905D2, S905X2 and S905Y2 devices, aka g12a. Say Y if you want peripherals to work. meson/Makefile 0000644 00000001577 14722071250 0007337 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only # Amlogic clock drivers obj-$(CONFIG_COMMON_CLK_MESON_AO_CLKC) += meson-aoclk.o obj-$(CONFIG_COMMON_CLK_MESON_CPU_DYNDIV) += clk-cpu-dyndiv.o obj-$(CONFIG_COMMON_CLK_MESON_DUALDIV) += clk-dualdiv.o obj-$(CONFIG_COMMON_CLK_MESON_EE_CLKC) += meson-eeclk.o obj-$(CONFIG_COMMON_CLK_MESON_MPLL) += clk-mpll.o obj-$(CONFIG_COMMON_CLK_MESON_PHASE) += clk-phase.o obj-$(CONFIG_COMMON_CLK_MESON_PLL) += clk-pll.o obj-$(CONFIG_COMMON_CLK_MESON_REGMAP) += clk-regmap.o obj-$(CONFIG_COMMON_CLK_MESON_SCLK_DIV) += sclk-div.o obj-$(CONFIG_COMMON_CLK_MESON_VID_PLL_DIV) += vid-pll-div.o # Amlogic Clock controllers obj-$(CONFIG_COMMON_CLK_AXG) += axg.o axg-aoclk.o obj-$(CONFIG_COMMON_CLK_AXG_AUDIO) += axg-audio.o obj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o gxbb-aoclk.o obj-$(CONFIG_COMMON_CLK_G12A) += g12a.o g12a-aoclk.o obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o ti/Kconfig 0000644 00000000404 14722071250 0006461 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only config COMMON_CLK_TI_ADPLL tristate "Clock driver for dm814x ADPLL" depends on ARCH_OMAP2PLUS || COMPILE_TEST default y if SOC_TI81XX ---help--- ADPLL clock driver for the dm814x SoC using common clock framework. ti/Makefile 0000644 00000002037 14722071250 0006622 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 ifeq ($(CONFIG_ARCH_OMAP2PLUS), y) obj-y += clk.o autoidle.o clockdomain.o clk-common = dpll.o composite.o divider.o gate.o \ fixed-factor.o mux.o apll.o \ clkt_dpll.o clkt_iclk.o clkt_dflt.o \ clkctrl.o obj-$(CONFIG_SOC_AM33XX) += $(clk-common) clk-33xx.o dpll3xxx.o \ clk-33xx-compat.o obj-$(CONFIG_SOC_TI81XX) += $(clk-common) fapll.o clk-814x.o clk-816x.o obj-$(CONFIG_ARCH_OMAP2) += $(clk-common) interface.o clk-2xxx.o obj-$(CONFIG_ARCH_OMAP3) += $(clk-common) interface.o \ clk-3xxx.o dpll3xxx.o obj-$(CONFIG_ARCH_OMAP4) += $(clk-common) clk-44xx.o \ dpll3xxx.o dpll44xx.o obj-$(CONFIG_SOC_OMAP5) += $(clk-common) clk-54xx.o \ dpll3xxx.o dpll44xx.o obj-$(CONFIG_SOC_DRA7XX) += $(clk-common) clk-7xx.o \ clk-dra7-atl.o dpll3xxx.o \ dpll44xx.o clk-7xx-compat.o obj-$(CONFIG_SOC_AM43XX) += $(clk-common) dpll3xxx.o clk-43xx.o \ clk-43xx-compat.o endif # CONFIG_ARCH_OMAP2PLUS obj-$(CONFIG_COMMON_CLK_TI_ADPLL) += adpll.o sprd/Kconfig 0000644 00000000575 14722071250 0007026 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only config SPRD_COMMON_CLK tristate "Clock support for Spreadtrum SoCs" depends on ARCH_SPRD || COMPILE_TEST default ARCH_SPRD select REGMAP_MMIO if SPRD_COMMON_CLK # SoC Drivers config SPRD_SC9860_CLK tristate "Support for the Spreadtrum SC9860 clocks" depends on (ARM64 && ARCH_SPRD) || COMPILE_TEST default ARM64 && ARCH_SPRD endif sprd/Makefile 0000644 00000000425 14722071250 0007155 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_SPRD_COMMON_CLK) += clk-sprd.o clk-sprd-y += common.o clk-sprd-y += gate.o clk-sprd-y += mux.o clk-sprd-y += div.o clk-sprd-y += composite.o clk-sprd-y += pll.o ## SoC support obj-$(CONFIG_SPRD_SC9860_CLK) += sc9860-clk.o mvebu/Kconfig 0000644 00000001516 14722071250 0007170 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only config MVEBU_CLK_COMMON bool config MVEBU_CLK_CPU bool config MVEBU_CLK_COREDIV bool config ARMADA_AP_CP_HELPER bool config ARMADA_370_CLK bool select MVEBU_CLK_COMMON select MVEBU_CLK_CPU config ARMADA_375_CLK bool select MVEBU_CLK_COMMON config ARMADA_38X_CLK bool select MVEBU_CLK_COMMON config ARMADA_39X_CLK bool select MVEBU_CLK_COMMON config ARMADA_37XX_CLK bool config ARMADA_XP_CLK bool select MVEBU_CLK_COMMON select MVEBU_CLK_CPU config ARMADA_AP806_SYSCON bool select ARMADA_AP_CP_HELPER config ARMADA_AP_CPU_CLK bool select ARMADA_AP_CP_HELPER config ARMADA_CP110_SYSCON bool select ARMADA_AP_CP_HELPER config DOVE_CLK bool select MVEBU_CLK_COMMON config KIRKWOOD_CLK bool select MVEBU_CLK_COMMON config ORION_CLK bool select MVEBU_CLK_COMMON mvebu/Makefile 0000644 00000001632 14722071250 0007324 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_MVEBU_CLK_COMMON) += common.o obj-$(CONFIG_MVEBU_CLK_CPU) += clk-cpu.o obj-$(CONFIG_MVEBU_CLK_COREDIV) += clk-corediv.o obj-$(CONFIG_ARMADA_AP_CP_HELPER) += armada_ap_cp_helper.o obj-$(CONFIG_ARMADA_370_CLK) += armada-370.o obj-$(CONFIG_ARMADA_375_CLK) += armada-375.o obj-$(CONFIG_ARMADA_38X_CLK) += armada-38x.o obj-$(CONFIG_ARMADA_39X_CLK) += armada-39x.o obj-$(CONFIG_ARMADA_37XX_CLK) += armada-37xx-xtal.o obj-$(CONFIG_ARMADA_37XX_CLK) += armada-37xx-tbg.o obj-$(CONFIG_ARMADA_37XX_CLK) += armada-37xx-periph.o obj-$(CONFIG_ARMADA_XP_CLK) += armada-xp.o mv98dx3236.o obj-$(CONFIG_ARMADA_AP806_SYSCON) += ap806-system-controller.o obj-$(CONFIG_ARMADA_AP_CPU_CLK) += ap-cpu-clk.o obj-$(CONFIG_ARMADA_CP110_SYSCON) += cp110-system-controller.o obj-$(CONFIG_DOVE_CLK) += dove.o dove-divider.o obj-$(CONFIG_KIRKWOOD_CLK) += kirkwood.o obj-$(CONFIG_ORION_CLK) += orion.o imx/Kconfig 0000644 00000001372 14722071250 0006647 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 # common clock support for NXP i.MX SoC family. config MXC_CLK bool def_bool ARCH_MXC config MXC_CLK_SCU bool depends on IMX_SCU config CLK_IMX8MM bool "IMX8MM CCM Clock Driver" depends on ARCH_MXC && ARM64 help Build the driver for i.MX8MM CCM Clock Driver config CLK_IMX8MN bool "IMX8MN CCM Clock Driver" depends on ARCH_MXC && ARM64 help Build the driver for i.MX8MN CCM Clock Driver config CLK_IMX8MQ bool "IMX8MQ CCM Clock Driver" depends on ARCH_MXC && ARM64 help Build the driver for i.MX8MQ CCM Clock Driver config CLK_IMX8QXP bool "IMX8QXP SCU Clock" depends on ARCH_MXC && IMX_SCU && ARM64 select MXC_CLK_SCU select MXC_CLK help Build the driver for IMX8QXP SCU based clocks. imx/Makefile 0000644 00000002326 14722071250 0007004 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_MXC_CLK) += \ clk.o \ clk-busy.o \ clk-composite-8m.o \ clk-cpu.o \ clk-composite-7ulp.o \ clk-divider-gate.o \ clk-fixup-div.o \ clk-fixup-mux.o \ clk-frac-pll.o \ clk-gate-exclusive.o \ clk-gate2.o \ clk-pfd.o \ clk-pfdv2.o \ clk-pllv1.o \ clk-pllv2.o \ clk-pllv3.o \ clk-pllv4.o \ clk-sccg-pll.o \ clk-pll14xx.o obj-$(CONFIG_MXC_CLK_SCU) += \ clk-scu.o \ clk-lpcg-scu.o obj-$(CONFIG_CLK_IMX8MM) += clk-imx8mm.o obj-$(CONFIG_CLK_IMX8MN) += clk-imx8mn.o obj-$(CONFIG_CLK_IMX8MQ) += clk-imx8mq.o obj-$(CONFIG_CLK_IMX8QXP) += clk-imx8qxp.o clk-imx8qxp-lpcg.o obj-$(CONFIG_SOC_IMX1) += clk-imx1.o obj-$(CONFIG_SOC_IMX21) += clk-imx21.o obj-$(CONFIG_SOC_IMX25) += clk-imx25.o obj-$(CONFIG_SOC_IMX27) += clk-imx27.o obj-$(CONFIG_SOC_IMX31) += clk-imx31.o obj-$(CONFIG_SOC_IMX35) += clk-imx35.o obj-$(CONFIG_SOC_IMX5) += clk-imx5.o obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o obj-$(CONFIG_SOC_IMX6SL) += clk-imx6sl.o obj-$(CONFIG_SOC_IMX6SLL) += clk-imx6sll.o obj-$(CONFIG_SOC_IMX6SX) += clk-imx6sx.o obj-$(CONFIG_SOC_IMX6UL) += clk-imx6ul.o obj-$(CONFIG_SOC_IMX7D) += clk-imx7d.o obj-$(CONFIG_SOC_IMX7ULP) += clk-imx7ulp.o obj-$(CONFIG_SOC_VF610) += clk-vf610.o Makefile 0000644 00000011256 14722071250 0006211 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 # common clock types obj-$(CONFIG_HAVE_CLK) += clk-devres.o clk-bulk.o obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o obj-$(CONFIG_COMMON_CLK) += clk.o obj-$(CONFIG_COMMON_CLK) += clk-divider.o obj-$(CONFIG_COMMON_CLK) += clk-fixed-factor.o obj-$(CONFIG_COMMON_CLK) += clk-fixed-rate.o obj-$(CONFIG_COMMON_CLK) += clk-gate.o obj-$(CONFIG_COMMON_CLK) += clk-multiplier.o obj-$(CONFIG_COMMON_CLK) += clk-mux.o obj-$(CONFIG_COMMON_CLK) += clk-composite.o obj-$(CONFIG_COMMON_CLK) += clk-fractional-divider.o obj-$(CONFIG_COMMON_CLK) += clk-gpio.o ifeq ($(CONFIG_OF), y) obj-$(CONFIG_COMMON_CLK) += clk-conf.o endif # hardware specific clock types # please keep this section sorted lexicographically by file path name obj-$(CONFIG_MACH_ASM9260) += clk-asm9260.o obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN) += clk-axi-clkgen.o obj-$(CONFIG_ARCH_AXXIA) += clk-axm5516.o obj-$(CONFIG_COMMON_CLK_BD718XX) += clk-bd718x7.o obj-$(CONFIG_COMMON_CLK_CDCE706) += clk-cdce706.o obj-$(CONFIG_COMMON_CLK_CDCE925) += clk-cdce925.o obj-$(CONFIG_ARCH_CLPS711X) += clk-clps711x.o obj-$(CONFIG_COMMON_CLK_CS2000_CP) += clk-cs2000-cp.o obj-$(CONFIG_ARCH_EFM32) += clk-efm32gg.o obj-$(CONFIG_COMMON_CLK_FIXED_MMIO) += clk-fixed-mmio.o obj-$(CONFIG_COMMON_CLK_GEMINI) += clk-gemini.o obj-$(CONFIG_COMMON_CLK_ASPEED) += clk-aspeed.o obj-$(CONFIG_MACH_ASPEED_G6) += clk-ast2600.o obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o obj-$(CONFIG_CLK_HSDK) += clk-hsdk-pll.o obj-$(CONFIG_COMMON_CLK_LOCHNAGAR) += clk-lochnagar.o obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o obj-$(CONFIG_COMMON_CLK_MAX9485) += clk-max9485.o obj-$(CONFIG_ARCH_MILBEAUT_M10V) += clk-milbeaut.o obj-$(CONFIG_ARCH_MOXART) += clk-moxart.o obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o obj-$(CONFIG_ARCH_NPCM7XX) += clk-npcm7xx.o obj-$(CONFIG_ARCH_NSPIRE) += clk-nspire.o obj-$(CONFIG_COMMON_CLK_OXNAS) += clk-oxnas.o obj-$(CONFIG_COMMON_CLK_PALMAS) += clk-palmas.o obj-$(CONFIG_COMMON_CLK_PWM) += clk-pwm.o obj-$(CONFIG_CLK_QORIQ) += clk-qoriq.o obj-$(CONFIG_COMMON_CLK_RK808) += clk-rk808.o obj-$(CONFIG_COMMON_CLK_HI655X) += clk-hi655x.o obj-$(CONFIG_COMMON_CLK_S2MPS11) += clk-s2mps11.o obj-$(CONFIG_COMMON_CLK_SCMI) += clk-scmi.o obj-$(CONFIG_COMMON_CLK_SCPI) += clk-scpi.o obj-$(CONFIG_COMMON_CLK_SI5341) += clk-si5341.o obj-$(CONFIG_COMMON_CLK_SI5351) += clk-si5351.o obj-$(CONFIG_COMMON_CLK_SI514) += clk-si514.o obj-$(CONFIG_COMMON_CLK_SI544) += clk-si544.o obj-$(CONFIG_COMMON_CLK_SI570) += clk-si570.o obj-$(CONFIG_COMMON_CLK_STM32F) += clk-stm32f4.o obj-$(CONFIG_COMMON_CLK_STM32H7) += clk-stm32h7.o obj-$(CONFIG_COMMON_CLK_STM32MP157) += clk-stm32mp1.o obj-$(CONFIG_ARCH_TANGO) += clk-tango4.o obj-$(CONFIG_CLK_TWL6040) += clk-twl6040.o obj-$(CONFIG_ARCH_U300) += clk-u300.o obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o obj-$(CONFIG_COMMON_CLK_VC5) += clk-versaclock5.o obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o obj-$(CONFIG_COMMON_CLK_XGENE) += clk-xgene.o # please keep this section sorted lexicographically by directory path name obj-y += actions/ obj-y += analogbits/ obj-$(CONFIG_COMMON_CLK_AT91) += at91/ obj-$(CONFIG_ARCH_ARTPEC) += axis/ obj-$(CONFIG_ARC_PLAT_AXS10X) += axs10x/ obj-y += bcm/ obj-$(CONFIG_ARCH_BERLIN) += berlin/ obj-$(CONFIG_ARCH_DAVINCI) += davinci/ obj-$(CONFIG_H8300) += h8300/ obj-$(CONFIG_ARCH_HISI) += hisilicon/ obj-y += imgtec/ obj-y += imx/ obj-y += ingenic/ obj-$(CONFIG_ARCH_K3) += keystone/ obj-$(CONFIG_ARCH_KEYSTONE) += keystone/ obj-$(CONFIG_MACH_LOONGSON32) += loongson1/ obj-y += mediatek/ obj-$(CONFIG_ARCH_MESON) += meson/ obj-$(CONFIG_MACH_PIC32) += microchip/ ifeq ($(CONFIG_COMMON_CLK), y) obj-$(CONFIG_ARCH_MMP) += mmp/ endif obj-y += mvebu/ obj-$(CONFIG_ARCH_MXS) += mxs/ obj-$(CONFIG_COMMON_CLK_NXP) += nxp/ obj-$(CONFIG_MACH_PISTACHIO) += pistachio/ obj-$(CONFIG_COMMON_CLK_PXA) += pxa/ obj-$(CONFIG_COMMON_CLK_QCOM) += qcom/ obj-y += renesas/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ obj-$(CONFIG_CLK_SIFIVE) += sifive/ obj-$(CONFIG_ARCH_SIRF) += sirf/ obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/ obj-$(CONFIG_PLAT_SPEAR) += spear/ obj-$(CONFIG_ARCH_SPRD) += sprd/ obj-$(CONFIG_ARCH_STI) += st/ obj-$(CONFIG_ARCH_STRATIX10) += socfpga/ obj-$(CONFIG_ARCH_SUNXI) += sunxi/ obj-$(CONFIG_SUNXI_CCU) += sunxi-ng/ obj-$(CONFIG_ARCH_TEGRA) += tegra/ obj-y += ti/ obj-$(CONFIG_CLK_UNIPHIER) += uniphier/ obj-$(CONFIG_ARCH_U8500) += ux500/ obj-$(CONFIG_COMMON_CLK_VERSATILE) += versatile/ ifeq ($(CONFIG_COMMON_CLK), y) obj-$(CONFIG_X86) += x86/ endif obj-$(CONFIG_ARCH_ZX) += zte/ obj-$(CONFIG_ARCH_ZYNQ) += zynq/ obj-$(CONFIG_COMMON_CLK_ZYNQMP) += zynqmp/ actions/Kconfig 0000644 00000001273 14722071250 0007512 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only config CLK_ACTIONS bool "Clock driver for Actions Semi SoCs" depends on ARCH_ACTIONS || COMPILE_TEST select REGMAP_MMIO select RESET_CONTROLLER default ARCH_ACTIONS if CLK_ACTIONS # SoC Drivers config CLK_OWL_S500 bool "Support for the Actions Semi OWL S500 clocks" depends on ARCH_ACTIONS || COMPILE_TEST default ARCH_ACTIONS config CLK_OWL_S700 bool "Support for the Actions Semi OWL S700 clocks" depends on (ARM64 && ARCH_ACTIONS) || COMPILE_TEST default ARM64 && ARCH_ACTIONS config CLK_OWL_S900 bool "Support for the Actions Semi OWL S900 clocks" depends on (ARM64 && ARCH_ACTIONS) || COMPILE_TEST default ARM64 && ARCH_ACTIONS endif actions/Makefile 0000644 00000000665 14722071250 0007653 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_CLK_ACTIONS) += clk-owl.o clk-owl-y += owl-common.o clk-owl-y += owl-gate.o clk-owl-y += owl-mux.o clk-owl-y += owl-divider.o clk-owl-y += owl-factor.o clk-owl-y += owl-composite.o clk-owl-y += owl-pll.o clk-owl-y += owl-reset.o # SoC support obj-$(CONFIG_CLK_OWL_S500) += owl-s500.o obj-$(CONFIG_CLK_OWL_S700) += owl-s700.o obj-$(CONFIG_CLK_OWL_S900) += owl-s900.o bcm/Kconfig 0000644 00000005220 14722071250 0006607 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only config CLK_BCM2835 bool "Broadcom BCM2835 clock support" depends on ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST depends on COMMON_CLK default ARCH_BCM2835 || ARCH_BRCMSTB help Enable common clock framework support for Broadcom BCM2835 SoCs. config CLK_BCM_63XX bool "Broadcom BCM63xx clock support" depends on ARCH_BCM_63XX || COMPILE_TEST select COMMON_CLK_IPROC default ARCH_BCM_63XX help Enable common clock framework support for Broadcom BCM63xx DSL SoCs based on the ARM architecture config CLK_BCM_63XX_GATE bool "Broadcom BCM63xx gated clock support" depends on BMIPS_GENERIC || COMPILE_TEST default BMIPS_GENERIC help Enable common clock framework support for Broadcom BCM63xx DSL SoCs based on the MIPS architecture config CLK_BCM_KONA bool "Broadcom Kona CCU clock support" depends on ARCH_BCM_MOBILE || COMPILE_TEST default ARCH_BCM_MOBILE help Enable common clock framework support for Broadcom SoCs using "Kona" style clock control units, including those in the BCM281xx and BCM21664 families. config COMMON_CLK_IPROC bool help Enable common clock framework support for Broadcom SoCs based on the iProc architecture config CLK_BCM_CYGNUS bool "Broadcom Cygnus clock support" depends on ARCH_BCM_CYGNUS || COMPILE_TEST select COMMON_CLK_IPROC default ARCH_BCM_CYGNUS help Enable common clock framework support for the Broadcom Cygnus SoC config CLK_BCM_HR2 bool "Broadcom Hurricane 2 clock support" depends on ARCH_BCM_HR2 || COMPILE_TEST select COMMON_CLK_IPROC default ARCH_BCM_HR2 help Enable common clock framework support for the Broadcom Hurricane 2 SoC config CLK_BCM_NSP bool "Broadcom Northstar/Northstar Plus clock support" depends on ARCH_BCM_5301X || ARCH_BCM_NSP || COMPILE_TEST select COMMON_CLK_IPROC default ARCH_BCM_5301X || ARCH_BCM_NSP help Enable common clock framework support for the Broadcom Northstar and Northstar Plus SoCs config CLK_BCM_NS2 bool "Broadcom Northstar 2 clock support" depends on ARCH_BCM_IPROC || COMPILE_TEST select COMMON_CLK_IPROC default ARCH_BCM_IPROC help Enable common clock framework support for the Broadcom Northstar 2 SoC config CLK_BCM_SR bool "Broadcom Stingray clock support" depends on ARCH_BCM_IPROC || COMPILE_TEST select COMMON_CLK_IPROC default ARCH_BCM_IPROC help Enable common clock framework support for the Broadcom Stingray SoC config CLK_RASPBERRYPI tristate "Raspberry Pi firmware based clock support" depends on RASPBERRYPI_FIRMWARE || (COMPILE_TEST && !RASPBERRYPI_FIRMWARE) help Enable common clock framework support for Raspberry Pi's firmware dependent clocks bcm/Makefile 0000644 00000001424 14722071250 0006746 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_CLK_BCM_63XX) += clk-bcm63xx.o obj-$(CONFIG_CLK_BCM_63XX_GATE) += clk-bcm63xx-gate.o obj-$(CONFIG_CLK_BCM_KONA) += clk-kona.o obj-$(CONFIG_CLK_BCM_KONA) += clk-kona-setup.o obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281xx.o obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o obj-$(CONFIG_CLK_BCM2835) += clk-bcm2835.o obj-$(CONFIG_CLK_BCM2835) += clk-bcm2835-aux.o obj-$(CONFIG_CLK_RASPBERRYPI) += clk-raspberrypi.o obj-$(CONFIG_ARCH_BCM_53573) += clk-bcm53573-ilp.o obj-$(CONFIG_CLK_BCM_CYGNUS) += clk-cygnus.o obj-$(CONFIG_CLK_BCM_HR2) += clk-hr2.o obj-$(CONFIG_CLK_BCM_NSP) += clk-nsp.o obj-$(CONFIG_CLK_BCM_NS2) += clk-ns2.o obj-$(CONFIG_CLK_BCM_SR) += clk-sr.o renesas/Kconfig 0000644 00000011645 14722071250 0007516 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 config CLK_RENESAS bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS default y if ARCH_RENESAS select CLK_EMEV2 if ARCH_EMEV2 select CLK_RZA1 if ARCH_R7S72100 select CLK_R7S9210 if ARCH_R7S9210 select CLK_R8A73A4 if ARCH_R8A73A4 select CLK_R8A7740 if ARCH_R8A7740 select CLK_R8A7743 if ARCH_R8A7743 || ARCH_R8A7744 select CLK_R8A7745 if ARCH_R8A7745 select CLK_R8A77470 if ARCH_R8A77470 select CLK_R8A774A1 if ARCH_R8A774A1 select CLK_R8A774C0 if ARCH_R8A774C0 select CLK_R8A7778 if ARCH_R8A7778 select CLK_R8A7779 if ARCH_R8A7779 select CLK_R8A7790 if ARCH_R8A7790 select CLK_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793 select CLK_R8A7792 if ARCH_R8A7792 select CLK_R8A7794 if ARCH_R8A7794 select CLK_R8A7795 if ARCH_R8A7795 select CLK_R8A7796 if ARCH_R8A7796 select CLK_R8A77965 if ARCH_R8A77965 select CLK_R8A77970 if ARCH_R8A77970 select CLK_R8A77980 if ARCH_R8A77980 select CLK_R8A77990 if ARCH_R8A77990 select CLK_R8A77995 if ARCH_R8A77995 select CLK_R9A06G032 if ARCH_R9A06G032 select CLK_SH73A0 if ARCH_SH73A0 if CLK_RENESAS config CLK_RENESAS_LEGACY bool "Legacy DT clock support" depends on CLK_R8A7790 || CLK_R8A7791 || CLK_R8A7792 || CLK_R8A7794 help Enable backward compatibility with old device trees describing a hierarchical representation of the various CPG and MSTP clocks. Say Y if you want your kernel to work with old DTBs. It is safe to say N if you use the DTS that is supplied with the current kernel source tree. # SoC config CLK_EMEV2 bool "Emma Mobile EV2 clock support" if COMPILE_TEST config CLK_RZA1 bool "RZ/A1H clock support" if COMPILE_TEST select CLK_RENESAS_CPG_MSTP config CLK_R7S9210 bool "RZ/A2 clock support" if COMPILE_TEST select CLK_RENESAS_CPG_MSSR config CLK_R8A73A4 bool "R-Mobile APE6 clock support" if COMPILE_TEST select CLK_RENESAS_CPG_MSTP select CLK_RENESAS_DIV6 config CLK_R8A7740 bool "R-Mobile A1 clock support" if COMPILE_TEST select CLK_RENESAS_CPG_MSTP select CLK_RENESAS_DIV6 config CLK_R8A7743 bool "RZ/G1M clock support" if COMPILE_TEST select CLK_RCAR_GEN2_CPG config CLK_R8A7745 bool "RZ/G1E clock support" if COMPILE_TEST select CLK_RCAR_GEN2_CPG config CLK_R8A77470 bool "RZ/G1C clock support" if COMPILE_TEST select CLK_RCAR_GEN2_CPG config CLK_R8A774A1 bool "RZ/G2M clock support" if COMPILE_TEST select CLK_RCAR_GEN3_CPG config CLK_R8A774C0 bool "RZ/G2E clock support" if COMPILE_TEST select CLK_RCAR_GEN3_CPG config CLK_R8A7778 bool "R-Car M1A clock support" if COMPILE_TEST select CLK_RENESAS_CPG_MSTP config CLK_R8A7779 bool "R-Car H1 clock support" if COMPILE_TEST select CLK_RENESAS_CPG_MSTP config CLK_R8A7790 bool "R-Car H2 clock support" if COMPILE_TEST select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY select CLK_RCAR_GEN2_CPG select CLK_RENESAS_DIV6 config CLK_R8A7791 bool "R-Car M2-W/N clock support" if COMPILE_TEST select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY select CLK_RCAR_GEN2_CPG select CLK_RENESAS_DIV6 config CLK_R8A7792 bool "R-Car V2H clock support" if COMPILE_TEST select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY select CLK_RCAR_GEN2_CPG config CLK_R8A7794 bool "R-Car E2 clock support" if COMPILE_TEST select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY select CLK_RCAR_GEN2_CPG select CLK_RENESAS_DIV6 config CLK_R8A7795 bool "R-Car H3 clock support" if COMPILE_TEST select CLK_RCAR_GEN3_CPG config CLK_R8A7796 bool "R-Car M3-W clock support" if COMPILE_TEST select CLK_RCAR_GEN3_CPG config CLK_R8A77965 bool "R-Car M3-N clock support" if COMPILE_TEST select CLK_RCAR_GEN3_CPG config CLK_R8A77970 bool "R-Car V3M clock support" if COMPILE_TEST select CLK_RCAR_GEN3_CPG config CLK_R8A77980 bool "R-Car V3H clock support" if COMPILE_TEST select CLK_RCAR_GEN3_CPG config CLK_R8A77990 bool "R-Car E3 clock support" if COMPILE_TEST select CLK_RCAR_GEN3_CPG config CLK_R8A77995 bool "R-Car D3 clock support" if COMPILE_TEST select CLK_RCAR_GEN3_CPG config CLK_R9A06G032 bool "Renesas R9A06G032 clock driver" help This is a driver for R9A06G032 clocks config CLK_SH73A0 bool "SH-Mobile AG5 clock support" if COMPILE_TEST select CLK_RENESAS_CPG_MSTP select CLK_RENESAS_DIV6 # Family config CLK_RCAR_GEN2 bool "R-Car Gen2 legacy clock support" if COMPILE_TEST select CLK_RENESAS_CPG_MSTP select CLK_RENESAS_DIV6 config CLK_RCAR_GEN2_CPG bool "R-Car Gen2 CPG clock support" if COMPILE_TEST select CLK_RENESAS_CPG_MSSR config CLK_RCAR_GEN3_CPG bool "R-Car Gen3 CPG clock support" if COMPILE_TEST select CLK_RENESAS_CPG_MSSR config CLK_RCAR_USB2_CLOCK_SEL bool "Renesas R-Car USB2 clock selector support" depends on ARCH_RENESAS || COMPILE_TEST help This is a driver for R-Car USB2 clock selector # Generic config CLK_RENESAS_CPG_MSSR bool "CPG/MSSR clock support" if COMPILE_TEST select CLK_RENESAS_DIV6 config CLK_RENESAS_CPG_MSTP bool "MSTP clock support" if COMPILE_TEST config CLK_RENESAS_DIV6 bool "DIV6 clock support" if COMPILE_TEST endif # CLK_RENESAS renesas/Makefile 0000644 00000003131 14722071250 0007642 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 # SoC obj-$(CONFIG_CLK_EMEV2) += clk-emev2.o obj-$(CONFIG_CLK_RZA1) += clk-rz.o obj-$(CONFIG_CLK_R7S9210) += r7s9210-cpg-mssr.o obj-$(CONFIG_CLK_R8A73A4) += clk-r8a73a4.o obj-$(CONFIG_CLK_R8A7740) += clk-r8a7740.o obj-$(CONFIG_CLK_R8A7743) += r8a7743-cpg-mssr.o obj-$(CONFIG_CLK_R8A7745) += r8a7745-cpg-mssr.o obj-$(CONFIG_CLK_R8A77470) += r8a77470-cpg-mssr.o obj-$(CONFIG_CLK_R8A774A1) += r8a774a1-cpg-mssr.o obj-$(CONFIG_CLK_R8A774C0) += r8a774c0-cpg-mssr.o obj-$(CONFIG_CLK_R8A7778) += clk-r8a7778.o obj-$(CONFIG_CLK_R8A7779) += clk-r8a7779.o obj-$(CONFIG_CLK_R8A7790) += r8a7790-cpg-mssr.o obj-$(CONFIG_CLK_R8A7791) += r8a7791-cpg-mssr.o obj-$(CONFIG_CLK_R8A7792) += r8a7792-cpg-mssr.o obj-$(CONFIG_CLK_R8A7794) += r8a7794-cpg-mssr.o obj-$(CONFIG_CLK_R8A7795) += r8a7795-cpg-mssr.o obj-$(CONFIG_CLK_R8A7796) += r8a7796-cpg-mssr.o obj-$(CONFIG_CLK_R8A77965) += r8a77965-cpg-mssr.o obj-$(CONFIG_CLK_R8A77970) += r8a77970-cpg-mssr.o obj-$(CONFIG_CLK_R8A77980) += r8a77980-cpg-mssr.o obj-$(CONFIG_CLK_R8A77990) += r8a77990-cpg-mssr.o obj-$(CONFIG_CLK_R8A77995) += r8a77995-cpg-mssr.o obj-$(CONFIG_CLK_R9A06G032) += r9a06g032-clocks.o obj-$(CONFIG_CLK_SH73A0) += clk-sh73a0.o # Family obj-$(CONFIG_CLK_RCAR_GEN2) += clk-rcar-gen2.o obj-$(CONFIG_CLK_RCAR_GEN2_CPG) += rcar-gen2-cpg.o obj-$(CONFIG_CLK_RCAR_GEN3_CPG) += rcar-gen3-cpg.o obj-$(CONFIG_CLK_RCAR_USB2_CLOCK_SEL) += rcar-usb2-clock-sel.o # Generic obj-$(CONFIG_CLK_RENESAS_CPG_MSSR) += renesas-cpg-mssr.o obj-$(CONFIG_CLK_RENESAS_CPG_MSTP) += clk-mstp.o obj-$(CONFIG_CLK_RENESAS_DIV6) += clk-div6.o imgtec/Kconfig 0000644 00000000621 14722071250 0007316 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only config COMMON_CLK_BOSTON bool "Clock driver for MIPS Boston boards" depends on MIPS || COMPILE_TEST select MFD_SYSCON ---help--- Enable this to support the system & CPU clocks on the MIPS Boston development board from Imagination Technologies. These are simple fixed rate clocks whose rate is determined by reading a platform provided register. imgtec/Makefile 0000644 00000000131 14722071250 0007447 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_COMMON_CLK_BOSTON) += clk-boston.o analogbits/Kconfig 0000644 00000000123 14722071250 0010166 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only config CLK_ANALOGBITS_WRPLL_CLN28HPC bool analogbits/Makefile 0000644 00000000144 14722071250 0010326 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_CLK_ANALOGBITS_WRPLL_CLN28HPC) += wrpll-cln28hpc.o socfpga/Makefile 0000644 00000000455 14722071250 0007632 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_ARCH_SOCFPGA) += clk.o clk-gate.o clk-pll.o clk-periph.o obj-$(CONFIG_ARCH_SOCFPGA) += clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o obj-$(CONFIG_ARCH_STRATIX10) += clk-s10.o obj-$(CONFIG_ARCH_STRATIX10) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o h8300/Makefile 0000644 00000000142 14722071250 0006743 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-y += clk-div.o obj-$(CONFIG_H8S2678) += clk-h8s2678.o hisilicon/Kconfig 0000644 00000003312 14722071250 0010027 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only config COMMON_CLK_HI3516CV300 tristate "HI3516CV300 Clock Driver" depends on ARCH_HISI || COMPILE_TEST select RESET_HISI default ARCH_HISI help Build the clock driver for hi3516cv300. config COMMON_CLK_HI3519 tristate "Hi3519 Clock Driver" depends on ARCH_HISI || COMPILE_TEST select RESET_HISI default ARCH_HISI help Build the clock driver for hi3519. config COMMON_CLK_HI3660 bool "Hi3660 Clock Driver" depends on ARCH_HISI || COMPILE_TEST default ARCH_HISI help Build the clock driver for hi3660. config COMMON_CLK_HI3670 bool "Hi3670 Clock Driver" depends on ARCH_HISI || COMPILE_TEST default ARCH_HISI help Build the clock driver for hi3670. config COMMON_CLK_HI3798CV200 tristate "Hi3798CV200 Clock Driver" depends on ARCH_HISI || COMPILE_TEST select RESET_HISI default ARCH_HISI help Build the clock driver for hi3798cv200. config COMMON_CLK_HI6220 bool "Hi6220 Clock Driver" depends on ARCH_HISI || COMPILE_TEST default ARCH_HISI help Build the Hisilicon Hi6220 clock driver based on the common clock framework. config RESET_HISI bool "HiSilicon Reset Controller Driver" depends on ARCH_HISI || COMPILE_TEST select RESET_CONTROLLER help Build reset controller driver for HiSilicon device chipsets. config STUB_CLK_HI6220 bool "Hi6220 Stub Clock Driver" if EXPERT depends on (COMMON_CLK_HI6220 || COMPILE_TEST) depends on MAILBOX default COMMON_CLK_HI6220 help Build the Hisilicon Hi6220 stub clock driver. config STUB_CLK_HI3660 bool "Hi3660 Stub Clock Driver" if EXPERT depends on (COMMON_CLK_HI3660 || COMPILE_TEST) depends on MAILBOX default COMMON_CLK_HI3660 help Build the Hisilicon Hi3660 stub clock driver. hisilicon/Makefile 0000644 00000001321 14722071250 0010162 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 # # Hisilicon Clock specific Makefile # obj-y += clk.o clkgate-separated.o clkdivider-hi6220.o clk-hisi-phase.o obj-$(CONFIG_ARCH_HI3xxx) += clk-hi3620.o obj-$(CONFIG_ARCH_HIP04) += clk-hip04.o obj-$(CONFIG_ARCH_HIX5HD2) += clk-hix5hd2.o obj-$(CONFIG_COMMON_CLK_HI3516CV300) += crg-hi3516cv300.o obj-$(CONFIG_COMMON_CLK_HI3519) += clk-hi3519.o obj-$(CONFIG_COMMON_CLK_HI3660) += clk-hi3660.o obj-$(CONFIG_COMMON_CLK_HI3670) += clk-hi3670.o obj-$(CONFIG_COMMON_CLK_HI3798CV200) += crg-hi3798cv200.o obj-$(CONFIG_COMMON_CLK_HI6220) += clk-hi6220.o obj-$(CONFIG_RESET_HISI) += reset.o obj-$(CONFIG_STUB_CLK_HI6220) += clk-hi6220-stub.o obj-$(CONFIG_STUB_CLK_HI3660) += clk-hi3660-stub.o at91/Makefile 0000644 00000001462 14722071250 0006765 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 # # Makefile for at91 specific clk # obj-y += pmc.o sckc.o dt-compat.o obj-y += clk-slow.o clk-main.o clk-pll.o clk-plldiv.o clk-master.o obj-y += clk-system.o clk-peripheral.o clk-programmable.o obj-$(CONFIG_HAVE_AT91_AUDIO_PLL) += clk-audio-pll.o obj-$(CONFIG_HAVE_AT91_UTMI) += clk-utmi.o obj-$(CONFIG_HAVE_AT91_USB_CLK) += clk-usb.o obj-$(CONFIG_HAVE_AT91_SMD) += clk-smd.o obj-$(CONFIG_HAVE_AT91_H32MX) += clk-h32mx.o obj-$(CONFIG_HAVE_AT91_GENERATED_CLK) += clk-generated.o obj-$(CONFIG_HAVE_AT91_I2S_MUX_CLK) += clk-i2s-mux.o obj-$(CONFIG_HAVE_AT91_SAM9X60_PLL) += clk-sam9x60-pll.o obj-$(CONFIG_SOC_AT91SAM9) += at91sam9260.o at91sam9rl.o at91sam9x5.o obj-$(CONFIG_SOC_SAM9X60) += sam9x60.o obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o obj-$(CONFIG_SOC_SAMA5D2) += sama5d2.o mediatek/Kconfig 0000644 00000025123 14722071250 0007635 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only # # MediaTek Clock Drivers # menu "Clock driver for MediaTek SoC" depends on ARCH_MEDIATEK || COMPILE_TEST config COMMON_CLK_MEDIATEK bool select RESET_CONTROLLER ---help--- MediaTek SoCs' clock support. config COMMON_CLK_MT2701 bool "Clock driver for MediaTek MT2701" depends on (ARCH_MEDIATEK && ARM) || COMPILE_TEST select COMMON_CLK_MEDIATEK default ARCH_MEDIATEK && ARM ---help--- This driver supports MediaTek MT2701 basic clocks. config COMMON_CLK_MT2701_MMSYS bool "Clock driver for MediaTek MT2701 mmsys" depends on COMMON_CLK_MT2701 ---help--- This driver supports MediaTek MT2701 mmsys clocks. config COMMON_CLK_MT2701_IMGSYS bool "Clock driver for MediaTek MT2701 imgsys" depends on COMMON_CLK_MT2701 ---help--- This driver supports MediaTek MT2701 imgsys clocks. config COMMON_CLK_MT2701_VDECSYS bool "Clock driver for MediaTek MT2701 vdecsys" depends on COMMON_CLK_MT2701 ---help--- This driver supports MediaTek MT2701 vdecsys clocks. config COMMON_CLK_MT2701_HIFSYS bool "Clock driver for MediaTek MT2701 hifsys" depends on COMMON_CLK_MT2701 ---help--- This driver supports MediaTek MT2701 hifsys clocks. config COMMON_CLK_MT2701_ETHSYS bool "Clock driver for MediaTek MT2701 ethsys" depends on COMMON_CLK_MT2701 ---help--- This driver supports MediaTek MT2701 ethsys clocks. config COMMON_CLK_MT2701_BDPSYS bool "Clock driver for MediaTek MT2701 bdpsys" depends on COMMON_CLK_MT2701 ---help--- This driver supports MediaTek MT2701 bdpsys clocks. config COMMON_CLK_MT2701_AUDSYS bool "Clock driver for Mediatek MT2701 audsys" depends on COMMON_CLK_MT2701 ---help--- This driver supports Mediatek MT2701 audsys clocks. config COMMON_CLK_MT2701_G3DSYS bool "Clock driver for MediaTek MT2701 g3dsys" depends on COMMON_CLK_MT2701 ---help--- This driver supports MediaTek MT2701 g3dsys clocks. config COMMON_CLK_MT2712 bool "Clock driver for MediaTek MT2712" depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST select COMMON_CLK_MEDIATEK default ARCH_MEDIATEK && ARM64 ---help--- This driver supports MediaTek MT2712 basic clocks. config COMMON_CLK_MT2712_BDPSYS bool "Clock driver for MediaTek MT2712 bdpsys" depends on COMMON_CLK_MT2712 ---help--- This driver supports MediaTek MT2712 bdpsys clocks. config COMMON_CLK_MT2712_IMGSYS bool "Clock driver for MediaTek MT2712 imgsys" depends on COMMON_CLK_MT2712 ---help--- This driver supports MediaTek MT2712 imgsys clocks. config COMMON_CLK_MT2712_JPGDECSYS bool "Clock driver for MediaTek MT2712 jpgdecsys" depends on COMMON_CLK_MT2712 ---help--- This driver supports MediaTek MT2712 jpgdecsys clocks. config COMMON_CLK_MT2712_MFGCFG bool "Clock driver for MediaTek MT2712 mfgcfg" depends on COMMON_CLK_MT2712 ---help--- This driver supports MediaTek MT2712 mfgcfg clocks. config COMMON_CLK_MT2712_MMSYS bool "Clock driver for MediaTek MT2712 mmsys" depends on COMMON_CLK_MT2712 ---help--- This driver supports MediaTek MT2712 mmsys clocks. config COMMON_CLK_MT2712_VDECSYS bool "Clock driver for MediaTek MT2712 vdecsys" depends on COMMON_CLK_MT2712 ---help--- This driver supports MediaTek MT2712 vdecsys clocks. config COMMON_CLK_MT2712_VENCSYS bool "Clock driver for MediaTek MT2712 vencsys" depends on COMMON_CLK_MT2712 ---help--- This driver supports MediaTek MT2712 vencsys clocks. config COMMON_CLK_MT6779 bool "Clock driver for MediaTek MT6779" depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST select COMMON_CLK_MEDIATEK default ARCH_MEDIATEK && ARM64 help This driver supports MediaTek MT6779 basic clocks. config COMMON_CLK_MT6779_MMSYS bool "Clock driver for MediaTek MT6779 mmsys" depends on COMMON_CLK_MT6779 help This driver supports MediaTek MT6779 mmsys clocks. config COMMON_CLK_MT6779_IMGSYS bool "Clock driver for MediaTek MT6779 imgsys" depends on COMMON_CLK_MT6779 help This driver supports MediaTek MT6779 imgsys clocks. config COMMON_CLK_MT6779_IPESYS bool "Clock driver for MediaTek MT6779 ipesys" depends on COMMON_CLK_MT6779 help This driver supports MediaTek MT6779 ipesys clocks. config COMMON_CLK_MT6779_CAMSYS bool "Clock driver for MediaTek MT6779 camsys" depends on COMMON_CLK_MT6779 help This driver supports MediaTek MT6779 camsys clocks. config COMMON_CLK_MT6779_VDECSYS bool "Clock driver for MediaTek MT6779 vdecsys" depends on COMMON_CLK_MT6779 help This driver supports MediaTek MT6779 vdecsys clocks. config COMMON_CLK_MT6779_VENCSYS bool "Clock driver for MediaTek MT6779 vencsys" depends on COMMON_CLK_MT6779 help This driver supports MediaTek MT6779 vencsys clocks. config COMMON_CLK_MT6779_MFGCFG bool "Clock driver for MediaTek MT6779 mfgcfg" depends on COMMON_CLK_MT6779 help This driver supports MediaTek MT6779 mfgcfg clocks. config COMMON_CLK_MT6779_AUDSYS bool "Clock driver for Mediatek MT6779 audsys" depends on COMMON_CLK_MT6779 help This driver supports Mediatek MT6779 audsys clocks. config COMMON_CLK_MT6797 bool "Clock driver for MediaTek MT6797" depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST select COMMON_CLK_MEDIATEK default ARCH_MEDIATEK && ARM64 ---help--- This driver supports MediaTek MT6797 basic clocks. config COMMON_CLK_MT6797_MMSYS bool "Clock driver for MediaTek MT6797 mmsys" depends on COMMON_CLK_MT6797 ---help--- This driver supports MediaTek MT6797 mmsys clocks. config COMMON_CLK_MT6797_IMGSYS bool "Clock driver for MediaTek MT6797 imgsys" depends on COMMON_CLK_MT6797 ---help--- This driver supports MediaTek MT6797 imgsys clocks. config COMMON_CLK_MT6797_VDECSYS bool "Clock driver for MediaTek MT6797 vdecsys" depends on COMMON_CLK_MT6797 ---help--- This driver supports MediaTek MT6797 vdecsys clocks. config COMMON_CLK_MT6797_VENCSYS bool "Clock driver for MediaTek MT6797 vencsys" depends on COMMON_CLK_MT6797 ---help--- This driver supports MediaTek MT6797 vencsys clocks. config COMMON_CLK_MT7622 bool "Clock driver for MediaTek MT7622" depends on ARCH_MEDIATEK || COMPILE_TEST select COMMON_CLK_MEDIATEK default ARCH_MEDIATEK ---help--- This driver supports MediaTek MT7622 basic clocks and clocks required for various periperals found on MediaTek. config COMMON_CLK_MT7622_ETHSYS bool "Clock driver for MediaTek MT7622 ETHSYS" depends on COMMON_CLK_MT7622 ---help--- This driver add support for clocks for Ethernet and SGMII required on MediaTek MT7622 SoC. config COMMON_CLK_MT7622_HIFSYS bool "Clock driver for MediaTek MT7622 HIFSYS" depends on COMMON_CLK_MT7622 ---help--- This driver supports MediaTek MT7622 HIFSYS clocks providing to PCI-E and USB. config COMMON_CLK_MT7622_AUDSYS bool "Clock driver for MediaTek MT7622 AUDSYS" depends on COMMON_CLK_MT7622 ---help--- This driver supports MediaTek MT7622 AUDSYS clocks providing to audio consumers such as I2S and TDM. config COMMON_CLK_MT7629 bool "Clock driver for MediaTek MT7629" depends on (ARCH_MEDIATEK && ARM) || COMPILE_TEST select COMMON_CLK_MEDIATEK default ARCH_MEDIATEK && ARM ---help--- This driver supports MediaTek MT7629 basic clocks and clocks required for various periperals found on MediaTek. config COMMON_CLK_MT7629_ETHSYS bool "Clock driver for MediaTek MT7629 ETHSYS" depends on COMMON_CLK_MT7629 ---help--- This driver add support for clocks for Ethernet and SGMII required on MediaTek MT7629 SoC. config COMMON_CLK_MT7629_HIFSYS bool "Clock driver for MediaTek MT7629 HIFSYS" depends on COMMON_CLK_MT7629 ---help--- This driver supports MediaTek MT7629 HIFSYS clocks providing to PCI-E and USB. config COMMON_CLK_MT8135 bool "Clock driver for MediaTek MT8135" depends on (ARCH_MEDIATEK && ARM) || COMPILE_TEST select COMMON_CLK_MEDIATEK default ARCH_MEDIATEK && ARM ---help--- This driver supports MediaTek MT8135 clocks. config COMMON_CLK_MT8173 bool "Clock driver for MediaTek MT8173" depends on ARCH_MEDIATEK || COMPILE_TEST select COMMON_CLK_MEDIATEK default ARCH_MEDIATEK ---help--- This driver supports MediaTek MT8173 clocks. config COMMON_CLK_MT8183 bool "Clock driver for MediaTek MT8183" depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST select COMMON_CLK_MEDIATEK default ARCH_MEDIATEK && ARM64 help This driver supports MediaTek MT8183 basic clocks. config COMMON_CLK_MT8183_AUDIOSYS bool "Clock driver for MediaTek MT8183 audiosys" depends on COMMON_CLK_MT8183 help This driver supports MediaTek MT8183 audiosys clocks. config COMMON_CLK_MT8183_CAMSYS bool "Clock driver for MediaTek MT8183 camsys" depends on COMMON_CLK_MT8183 help This driver supports MediaTek MT8183 camsys clocks. config COMMON_CLK_MT8183_IMGSYS bool "Clock driver for MediaTek MT8183 imgsys" depends on COMMON_CLK_MT8183 help This driver supports MediaTek MT8183 imgsys clocks. config COMMON_CLK_MT8183_IPU_CORE0 bool "Clock driver for MediaTek MT8183 ipu_core0" depends on COMMON_CLK_MT8183 help This driver supports MediaTek MT8183 ipu_core0 clocks. config COMMON_CLK_MT8183_IPU_CORE1 bool "Clock driver for MediaTek MT8183 ipu_core1" depends on COMMON_CLK_MT8183 help This driver supports MediaTek MT8183 ipu_core1 clocks. config COMMON_CLK_MT8183_IPU_ADL bool "Clock driver for MediaTek MT8183 ipu_adl" depends on COMMON_CLK_MT8183 help This driver supports MediaTek MT8183 ipu_adl clocks. config COMMON_CLK_MT8183_IPU_CONN bool "Clock driver for MediaTek MT8183 ipu_conn" depends on COMMON_CLK_MT8183 help This driver supports MediaTek MT8183 ipu_conn clocks. config COMMON_CLK_MT8183_MFGCFG bool "Clock driver for MediaTek MT8183 mfgcfg" depends on COMMON_CLK_MT8183 help This driver supports MediaTek MT8183 mfgcfg clocks. config COMMON_CLK_MT8183_MMSYS bool "Clock driver for MediaTek MT8183 mmsys" depends on COMMON_CLK_MT8183 help This driver supports MediaTek MT8183 mmsys clocks. config COMMON_CLK_MT8183_VDECSYS bool "Clock driver for MediaTek MT8183 vdecsys" depends on COMMON_CLK_MT8183 help This driver supports MediaTek MT8183 vdecsys clocks. config COMMON_CLK_MT8183_VENCSYS bool "Clock driver for MediaTek MT8183 vencsys" depends on COMMON_CLK_MT8183 help This driver supports MediaTek MT8183 vencsys clocks. config COMMON_CLK_MT8516 bool "Clock driver for MediaTek MT8516" depends on ARCH_MEDIATEK || COMPILE_TEST select COMMON_CLK_MEDIATEK default ARCH_MEDIATEK help This driver supports MediaTek MT8516 clocks. config COMMON_CLK_MT8516_AUDSYS bool "Clock driver for MediaTek MT8516 audsys" depends on COMMON_CLK_MT8516 help This driver supports MediaTek MT8516 audsys clocks. endmenu mediatek/Makefile 0000644 00000006302 14722071250 0007770 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o clk-apmixed.o clk-cpumux.o reset.o clk-mux.o obj-$(CONFIG_COMMON_CLK_MT6779) += clk-mt6779.o obj-$(CONFIG_COMMON_CLK_MT6779_MMSYS) += clk-mt6779-mm.o obj-$(CONFIG_COMMON_CLK_MT6779_IMGSYS) += clk-mt6779-img.o obj-$(CONFIG_COMMON_CLK_MT6779_IPESYS) += clk-mt6779-ipe.o obj-$(CONFIG_COMMON_CLK_MT6779_CAMSYS) += clk-mt6779-cam.o obj-$(CONFIG_COMMON_CLK_MT6779_VDECSYS) += clk-mt6779-vdec.o obj-$(CONFIG_COMMON_CLK_MT6779_VENCSYS) += clk-mt6779-venc.o obj-$(CONFIG_COMMON_CLK_MT6779_MFGCFG) += clk-mt6779-mfg.o obj-$(CONFIG_COMMON_CLK_MT6779_AUDSYS) += clk-mt6779-aud.o obj-$(CONFIG_COMMON_CLK_MT6797) += clk-mt6797.o obj-$(CONFIG_COMMON_CLK_MT6797_IMGSYS) += clk-mt6797-img.o obj-$(CONFIG_COMMON_CLK_MT6797_MMSYS) += clk-mt6797-mm.o obj-$(CONFIG_COMMON_CLK_MT6797_VDECSYS) += clk-mt6797-vdec.o obj-$(CONFIG_COMMON_CLK_MT6797_VENCSYS) += clk-mt6797-venc.o obj-$(CONFIG_COMMON_CLK_MT2701) += clk-mt2701.o obj-$(CONFIG_COMMON_CLK_MT2701_AUDSYS) += clk-mt2701-aud.o obj-$(CONFIG_COMMON_CLK_MT2701_BDPSYS) += clk-mt2701-bdp.o obj-$(CONFIG_COMMON_CLK_MT2701_ETHSYS) += clk-mt2701-eth.o obj-$(CONFIG_COMMON_CLK_MT2701_G3DSYS) += clk-mt2701-g3d.o obj-$(CONFIG_COMMON_CLK_MT2701_HIFSYS) += clk-mt2701-hif.o obj-$(CONFIG_COMMON_CLK_MT2701_IMGSYS) += clk-mt2701-img.o obj-$(CONFIG_COMMON_CLK_MT2701_MMSYS) += clk-mt2701-mm.o obj-$(CONFIG_COMMON_CLK_MT2701_VDECSYS) += clk-mt2701-vdec.o obj-$(CONFIG_COMMON_CLK_MT2712) += clk-mt2712.o obj-$(CONFIG_COMMON_CLK_MT2712_BDPSYS) += clk-mt2712-bdp.o obj-$(CONFIG_COMMON_CLK_MT2712_IMGSYS) += clk-mt2712-img.o obj-$(CONFIG_COMMON_CLK_MT2712_JPGDECSYS) += clk-mt2712-jpgdec.o obj-$(CONFIG_COMMON_CLK_MT2712_MFGCFG) += clk-mt2712-mfg.o obj-$(CONFIG_COMMON_CLK_MT2712_MMSYS) += clk-mt2712-mm.o obj-$(CONFIG_COMMON_CLK_MT2712_VDECSYS) += clk-mt2712-vdec.o obj-$(CONFIG_COMMON_CLK_MT2712_VENCSYS) += clk-mt2712-venc.o obj-$(CONFIG_COMMON_CLK_MT7622) += clk-mt7622.o obj-$(CONFIG_COMMON_CLK_MT7622_ETHSYS) += clk-mt7622-eth.o obj-$(CONFIG_COMMON_CLK_MT7622_HIFSYS) += clk-mt7622-hif.o obj-$(CONFIG_COMMON_CLK_MT7622_AUDSYS) += clk-mt7622-aud.o obj-$(CONFIG_COMMON_CLK_MT7629) += clk-mt7629.o obj-$(CONFIG_COMMON_CLK_MT7629_ETHSYS) += clk-mt7629-eth.o obj-$(CONFIG_COMMON_CLK_MT7629_HIFSYS) += clk-mt7629-hif.o obj-$(CONFIG_COMMON_CLK_MT8135) += clk-mt8135.o obj-$(CONFIG_COMMON_CLK_MT8173) += clk-mt8173.o obj-$(CONFIG_COMMON_CLK_MT8183) += clk-mt8183.o obj-$(CONFIG_COMMON_CLK_MT8183_AUDIOSYS) += clk-mt8183-audio.o obj-$(CONFIG_COMMON_CLK_MT8183_CAMSYS) += clk-mt8183-cam.o obj-$(CONFIG_COMMON_CLK_MT8183_IMGSYS) += clk-mt8183-img.o obj-$(CONFIG_COMMON_CLK_MT8183_IPU_CORE0) += clk-mt8183-ipu0.o obj-$(CONFIG_COMMON_CLK_MT8183_IPU_CORE1) += clk-mt8183-ipu1.o obj-$(CONFIG_COMMON_CLK_MT8183_IPU_ADL) += clk-mt8183-ipu_adl.o obj-$(CONFIG_COMMON_CLK_MT8183_IPU_CONN) += clk-mt8183-ipu_conn.o obj-$(CONFIG_COMMON_CLK_MT8183_MFGCFG) += clk-mt8183-mfgcfg.o obj-$(CONFIG_COMMON_CLK_MT8183_MMSYS) += clk-mt8183-mm.o obj-$(CONFIG_COMMON_CLK_MT8183_VDECSYS) += clk-mt8183-vdec.o obj-$(CONFIG_COMMON_CLK_MT8183_VENCSYS) += clk-mt8183-venc.o obj-$(CONFIG_COMMON_CLK_MT8516) += clk-mt8516.o obj-$(CONFIG_COMMON_CLK_MT8516_AUDSYS) += clk-mt8516-aud.o rockchip/Makefile 0000644 00000001023 14722071250 0010002 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 # # Rockchip Clock specific Makefile # obj-y += clk.o obj-y += clk-pll.o obj-y += clk-cpu.o obj-y += clk-half-divider.o obj-y += clk-inverter.o obj-y += clk-mmc-phase.o obj-y += clk-muxgrf.o obj-y += clk-ddr.o obj-$(CONFIG_RESET_CONTROLLER) += softrst.o obj-y += clk-px30.o obj-y += clk-rv1108.o obj-y += clk-rk3036.o obj-y += clk-rk3128.o obj-y += clk-rk3188.o obj-y += clk-rk3228.o obj-y += clk-rk3288.o obj-y += clk-rk3308.o obj-y += clk-rk3328.o obj-y += clk-rk3368.o obj-y += clk-rk3399.o samsung/Kconfig 0000644 00000002734 14722071250 0007532 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only # Recent Exynos platforms should just select COMMON_CLK_SAMSUNG: config COMMON_CLK_SAMSUNG bool "Samsung Exynos clock controller support" if COMPILE_TEST # Clocks on ARM64 SoCs (e.g. Exynos5433, Exynos7) are chosen by # EXYNOS_ARM64_COMMON_CLK to avoid building them on ARMv7: select EXYNOS_ARM64_COMMON_CLK if ARM64 && ARCH_EXYNOS config EXYNOS_ARM64_COMMON_CLK bool "Samsung Exynos ARMv8-family clock controller support" if COMPILE_TEST depends on COMMON_CLK_SAMSUNG config EXYNOS_AUDSS_CLK_CON tristate "Samsung Exynos AUDSS clock controller support" depends on COMMON_CLK_SAMSUNG default y if ARCH_EXYNOS help Support for the Audio Subsystem CLKCON clock controller present on some Exynos SoC variants. Choose M or Y here if you want to use audio devices such as I2S, PCM, etc. # For S3C24XX platforms, select following symbols: config S3C2410_COMMON_CLK bool "Samsung S3C2410 clock controller support" if COMPILE_TEST select COMMON_CLK_SAMSUNG help Build the s3c2410 clock driver based on the common clock framework. config S3C2410_COMMON_DCLK bool select COMMON_CLK_SAMSUNG select REGMAP_MMIO help Temporary symbol to build the dclk driver based on the common clock framework. config S3C2412_COMMON_CLK bool "Samsung S3C2412 clock controller support" if COMPILE_TEST select COMMON_CLK_SAMSUNG config S3C2443_COMMON_CLK bool "Samsung S3C2443 clock controller support" if COMPILE_TEST select COMMON_CLK_SAMSUNG samsung/Makefile 0000644 00000002117 14722071250 0007662 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 # # Samsung Clock specific Makefile # obj-$(CONFIG_COMMON_CLK) += clk.o clk-pll.o clk-cpu.o obj-$(CONFIG_SOC_EXYNOS3250) += clk-exynos3250.o obj-$(CONFIG_ARCH_EXYNOS4) += clk-exynos4.o obj-$(CONFIG_ARCH_EXYNOS4) += clk-exynos4412-isp.o obj-$(CONFIG_SOC_EXYNOS5250) += clk-exynos5250.o obj-$(CONFIG_SOC_EXYNOS5250) += clk-exynos5-subcmu.o obj-$(CONFIG_SOC_EXYNOS5260) += clk-exynos5260.o obj-$(CONFIG_SOC_EXYNOS5410) += clk-exynos5410.o obj-$(CONFIG_SOC_EXYNOS5420) += clk-exynos5420.o obj-$(CONFIG_SOC_EXYNOS5420) += clk-exynos5-subcmu.o obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos5433.o obj-$(CONFIG_EXYNOS_AUDSS_CLK_CON) += clk-exynos-audss.o obj-$(CONFIG_ARCH_EXYNOS) += clk-exynos-clkout.o obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos7.o obj-$(CONFIG_S3C2410_COMMON_CLK)+= clk-s3c2410.o obj-$(CONFIG_S3C2410_COMMON_DCLK)+= clk-s3c2410-dclk.o obj-$(CONFIG_S3C2412_COMMON_CLK)+= clk-s3c2412.o obj-$(CONFIG_S3C2443_COMMON_CLK)+= clk-s3c2443.o obj-$(CONFIG_ARCH_S3C64XX) += clk-s3c64xx.o obj-$(CONFIG_ARCH_S5PV210) += clk-s5pv210.o clk-s5pv210-audss.o versatile/Kconfig 0000644 00000002027 14722071250 0010046 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only config ICST bool config COMMON_CLK_VERSATILE bool "Clock driver for ARM Reference designs" depends on ARCH_INTEGRATOR || ARCH_REALVIEW || \ ARCH_VERSATILE || ARCH_VEXPRESS || ARM64 || \ COMPILE_TEST select REGMAP_MMIO ---help--- Supports clocking on ARM Reference designs: - Integrator/AP and Integrator/CP - RealView PB1176, EB, PB11MP and PBX - Versatile Express config CLK_SP810 bool "Clock driver for ARM SP810 System Controller" depends on COMMON_CLK_VERSATILE default y if ARCH_VEXPRESS ---help--- Supports clock muxing (REFCLK/TIMCLK to TIMERCLKEN0-3) capabilities of the ARM SP810 System Controller cell. config CLK_VEXPRESS_OSC bool "Clock driver for Versatile Express OSC clock generators" depends on COMMON_CLK_VERSATILE depends on VEXPRESS_CONFIG default y if ARCH_VEXPRESS ---help--- Simple regmap-based driver driving clock generators on Versatile Express platforms hidden behind its configuration infrastructure, commonly known as OSCs. versatile/Makefile 0000644 00000000425 14722071250 0010203 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only # Makefile for Versatile-specific clocks obj-$(CONFIG_ICST) += icst.o clk-icst.o clk-versatile.o obj-$(CONFIG_INTEGRATOR_IMPD1) += clk-impd1.o obj-$(CONFIG_CLK_SP810) += clk-sp810.o obj-$(CONFIG_CLK_VEXPRESS_OSC) += clk-vexpress-osc.o
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