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class-wpml-tm-reset-options-filter.php 0000644 00000001347 14721647674 0014100 0 ustar 00 <?php /** * WPML_TM_Reset_Options_Filter class file * * @package WPML\TM */ /** * Class WPML_TM_Reset_Options_Filter */ class WPML_TM_Reset_Options_Filter implements IWPML_Action { /** * Add hooks */ public function add_hooks() { add_filter( 'wpml_reset_options', array( $this, 'reset_options' ) ); } /** * Add options to reset. * * @param array $options Options. * * @return array */ public function reset_options( array $options ) { $options[] = WPML_TM_Wizard_Options::WIZARD_COMPLETE_FOR_MANAGER; $options[] = WPML_TM_Wizard_Options::WIZARD_COMPLETE_FOR_ADMIN; $options[] = WPML_TM_Wizard_Options::CURRENT_STEP; $options[] = WPML_TM_Wizard_Options::WHO_WILL_TRANSLATE_MODE; return $options; } } class-wpml-tm-reset-options-filter-factory.php 0000644 00000000614 14721647674 0015541 0 ustar 00 <?php /** * WPML_TM_Reset_Options_Filter_Factory class file. * * @package WPML\TM */ /** * Class WPML_TM_Reset_Options_Filter_Factory */ class WPML_TM_Reset_Options_Filter_Factory implements IWPML_Backend_Action_Loader { /** * Create reset options filter. * * @return WPML_TM_Reset_Options_Filter */ public function create() { return new WPML_TM_Reset_Options_Filter(); } } Kconfig 0000644 00000014637 14722072302 0006061 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only config ARCH_HAS_RESET_CONTROLLER bool menuconfig RESET_CONTROLLER bool "Reset Controller Support" default y if ARCH_HAS_RESET_CONTROLLER help Generic Reset Controller support. This framework is designed to abstract reset handling of devices via GPIOs or SoC-internal reset controller modules. If unsure, say no. if RESET_CONTROLLER config RESET_A10SR tristate "Altera Arria10 System Resource Reset" depends on MFD_ALTERA_A10SR help This option enables support for the external reset functions for peripheral PHYs on the Altera Arria10 System Resource Chip. config RESET_ATH79 bool "AR71xx Reset Driver" if COMPILE_TEST default ATH79 help This enables the ATH79 reset controller driver that supports the AR71xx SoC reset controller. config RESET_AXS10X bool "AXS10x Reset Driver" if COMPILE_TEST default ARC_PLAT_AXS10X help This enables the reset controller driver for AXS10x. config RESET_BERLIN bool "Berlin Reset Driver" if COMPILE_TEST default ARCH_BERLIN help This enables the reset controller driver for Marvell Berlin SoCs. config RESET_BRCMSTB tristate "Broadcom STB reset controller" depends on ARCH_BRCMSTB || COMPILE_TEST default ARCH_BRCMSTB help This enables the reset controller driver for Broadcom STB SoCs using a SUN_TOP_CTRL_SW_INIT style controller. config RESET_HSDK bool "Synopsys HSDK Reset Driver" depends on HAS_IOMEM depends on ARC_SOC_HSDK || COMPILE_TEST help This enables the reset controller driver for HSDK board. config RESET_IMX7 bool "i.MX7/8 Reset Driver" if COMPILE_TEST depends on HAS_IOMEM default SOC_IMX7D || (ARM64 && ARCH_MXC) select MFD_SYSCON help This enables the reset controller driver for i.MX7 SoCs. config RESET_LANTIQ bool "Lantiq XWAY Reset Driver" if COMPILE_TEST default SOC_TYPE_XWAY help This enables the reset controller driver for Lantiq / Intel XWAY SoCs. config RESET_LPC18XX bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST default ARCH_LPC18XX help This enables the reset controller driver for NXP LPC18xx/43xx SoCs. config RESET_MESON bool "Meson Reset Driver" if COMPILE_TEST default ARCH_MESON help This enables the reset driver for Amlogic Meson SoCs. config RESET_MESON_AUDIO_ARB tristate "Meson Audio Memory Arbiter Reset Driver" depends on ARCH_MESON || COMPILE_TEST help This enables the reset driver for Audio Memory Arbiter of Amlogic's A113 based SoCs config RESET_OXNAS bool config RESET_PISTACHIO bool "Pistachio Reset Driver" if COMPILE_TEST default MACH_PISTACHIO help This enables the reset driver for ImgTec Pistachio SoCs. config RESET_QCOM_AOSS bool "Qcom AOSS Reset Driver" depends on ARCH_QCOM || COMPILE_TEST help This enables the AOSS (always on subsystem) reset driver for Qualcomm SDM845 SoCs. Say Y if you want to control reset signals provided by AOSS for Modem, Venus, ADSP, GPU, Camera, Wireless, Display subsystem. Otherwise, say N. config RESET_QCOM_PDC tristate "Qualcomm PDC Reset Driver" depends on ARCH_QCOM || COMPILE_TEST help This enables the PDC (Power Domain Controller) reset driver for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want to control reset signals provided by PDC for Modem, Compute, Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS. config RESET_SCMI tristate "Reset driver controlled via ARM SCMI interface" depends on ARM_SCMI_PROTOCOL || COMPILE_TEST default ARM_SCMI_PROTOCOL help This driver provides support for reset signal/domains that are controlled by firmware that implements the SCMI interface. This driver uses SCMI Message Protocol to interact with the firmware controlling all the reset signals. config RESET_SIMPLE bool "Simple Reset Controller Driver" if COMPILE_TEST default ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED || ARCH_BITMAIN || ARC help This enables a simple reset controller driver for reset lines that that can be asserted and deasserted by toggling bits in a contiguous, exclusive register space. Currently this driver supports: - Altera SoCFPGAs - ASPEED BMC SoCs - RCC reset controller in STM32 MCUs - Allwinner SoCs - ZTE's zx2967 family - Bitmain BM1880 SoC config RESET_STM32MP157 bool "STM32MP157 Reset Driver" if COMPILE_TEST default MACH_STM32MP157 help This enables the RCC reset controller driver for STM32 MPUs. config RESET_SOCFPGA bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA default ARCH_SOCFPGA select RESET_SIMPLE help This enables the reset driver for the SoCFPGA ARMv7 platforms. This driver gets initialized early during platform init calls. config RESET_SUNXI bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI default ARCH_SUNXI select RESET_SIMPLE help This enables the reset driver for Allwinner SoCs. config RESET_TI_SCI tristate "TI System Control Interface (TI-SCI) reset driver" depends on TI_SCI_PROTOCOL help This enables the reset driver support over TI System Control Interface available on some new TI's SoCs. If you wish to use reset resources managed by the TI System Controller, say Y here. Otherwise, say N. config RESET_TI_SYSCON tristate "TI SYSCON Reset Driver" depends on HAS_IOMEM select MFD_SYSCON help This enables the reset driver support for TI devices with memory-mapped reset registers as part of a syscon device node. If you wish to use the reset framework for such memory-mapped devices, say Y here. Otherwise, say N. config RESET_UNIPHIER tristate "Reset controller driver for UniPhier SoCs" depends on ARCH_UNIPHIER || COMPILE_TEST depends on OF && MFD_SYSCON default ARCH_UNIPHIER help Support for reset controllers on UniPhier SoCs. Say Y if you want to control reset signals provided by System Control block, Media I/O block, Peripheral Block. config RESET_UNIPHIER_GLUE tristate "Reset driver in glue layer for UniPhier SoCs" depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF default ARCH_UNIPHIER select RESET_SIMPLE help Support for peripheral core reset included in its own glue layer on UniPhier SoCs. Say Y if you want to control reset signals provided by the glue layer. config RESET_ZYNQ bool "ZYNQ Reset Driver" if COMPILE_TEST default ARCH_ZYNQ help This enables the reset controller driver for Xilinx Zynq SoCs. source "drivers/reset/sti/Kconfig" source "drivers/reset/hisilicon/Kconfig" source "drivers/reset/tegra/Kconfig" endif tegra/Kconfig 0000644 00000000125 14722072302 0007146 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only config RESET_TEGRA_BPMP def_bool TEGRA_BPMP tegra/Makefile 0000644 00000000127 14722072302 0007305 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_RESET_TEGRA_BPMP) += reset-bpmp.o Makefile 0000644 00000002507 14722072302 0006207 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 obj-y += core.o obj-y += hisilicon/ obj-$(CONFIG_ARCH_STI) += sti/ obj-$(CONFIG_ARCH_TEGRA) += tegra/ obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o obj-$(CONFIG_RESET_ATH79) += reset-ath79.o obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o obj-$(CONFIG_RESET_IMX7) += reset-imx7.o obj-$(CONFIG_RESET_LANTIQ) += reset-lantiq.o obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o obj-$(CONFIG_RESET_MESON) += reset-meson.o obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o obj-$(CONFIG_RESET_QCOM_AOSS) += reset-qcom-aoss.o obj-$(CONFIG_RESET_QCOM_PDC) += reset-qcom-pdc.o obj-$(CONFIG_RESET_SCMI) += reset-scmi.o obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o obj-$(CONFIG_RESET_STM32MP157) += reset-stm32mp1.o obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o obj-$(CONFIG_RESET_UNIPHIER_GLUE) += reset-uniphier-glue.o obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o obj-$(CONFIG_ARCH_ZYNQMP) += reset-zynqmp.o sti/Kconfig 0000644 00000000217 14722072302 0006645 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only if ARCH_STI config STI_RESET_SYSCFG bool config STIH407_RESET bool select STI_RESET_SYSCFG endif sti/Makefile 0000644 00000000211 14722072302 0006774 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_STI_RESET_SYSCFG) += reset-syscfg.o obj-$(CONFIG_STIH407_RESET) += reset-stih407.o hisilicon/Kconfig 0000644 00000000565 14722072302 0010035 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only config COMMON_RESET_HI3660 tristate "Hi3660 Reset Driver" depends on ARCH_HISI || COMPILE_TEST default ARCH_HISI help Build the Hisilicon Hi3660 reset driver. config COMMON_RESET_HI6220 tristate "Hi6220 Reset Driver" depends on ARCH_HISI || COMPILE_TEST default ARCH_HISI help Build the Hisilicon Hi6220 reset driver. hisilicon/Makefile 0000644 00000000220 14722072302 0010156 0 ustar 00 # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_COMMON_RESET_HI6220) += hi6220_reset.o obj-$(CONFIG_COMMON_RESET_HI3660) += reset-hi3660.o
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